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Si-En Chang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Si-En Chang, Chia-Chang Hsu
    Efficient Simulation Methods for Multi-Level Cache Memory Hierarchies. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:221-230 [Conf]
  2. Shyh-An Chi, R.-Ming Shiu, Jih-Ching Chiu, Si-En Chang, Chung-Ping Chung
    Instruction Cache Prefetching with Extended BTB. [Citation Graph (0, 0)][DBLP]
    ICPADS, 1997, pp:360-0 [Conf]
  3. Si-En Chang, Y. Paul Chiang
    Restricted AND-Parallelism Execution Model with Side-Effects. [Citation Graph (0, 0)][DBLP]
    NACLP, 1989, pp:350-368 [Conf]
  4. Si-En Chang, M. L. Manwaring, Y. Paul Chiang
    Extended restricted AND-parallelism execution model. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:471-474 [Conf]

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