Search the dblp DataBase
Christof Paar :
[Publications ]
[Author Rank by year ]
[Co-authors ]
[Prefers ]
[Cites ]
[Cited by ]
Publications of Author
André Weimerskirch , Christof Paar , Sheueling Chang Shantz Elliptic Curve Cryptography on a Palm OS Device. [Citation Graph (0, 0)][DBLP ] ACISP, 2001, pp:502-513 [Conf ] Kerstin Lemke , Christof Paar , Ahmad-Reza Sadeghi Physical Security Bounds Against Tampering. [Citation Graph (0, 0)][DBLP ] ACNS, 2006, pp:253-267 [Conf ] Adam J. Elbirt , W. Yip , B. Chetwynd , Christof Paar An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists. [Citation Graph (0, 0)][DBLP ] AES Candidate Conference, 2000, pp:13-27 [Conf ] Thomas J. Wollinger , Min Wang , Jorge Guajardo , Christof Paar How Well Are High-End DSPs Suited for the AES Algorithms? AES Algorithms on the TMS320C6x DSP. [Citation Graph (0, 0)][DBLP ] AES Candidate Conference, 2000, pp:94-105 [Conf ] Johann Großschädl , Sandeep S. Kumar , Christof Paar Architectural Support for Arithmetic in Optimal Extension Fields. [Citation Graph (0, 0)][DBLP ] ASAP, 2004, pp:111-124 [Conf ] Adam D. Woodbury , Daniel V. Bailey , Christof Paar Elliptic Curve Cryptography on Smart Cards without Coprocessors. [Citation Graph (0, 0)][DBLP ] CARDIS, 2000, pp:71-92 [Conf ] Sandeep Kumar , Christof Paar , Jan Pelzl , Gerd Pfeiffer , Manfred Schimmler A Configuration Concept for a Massively Parallel FPGA Architecture. [Citation Graph (0, 0)][DBLP ] CDES, 2006, pp:207-212 [Conf ] Jens Franke , Thorsten Kleinjung , Christof Paar , Jan Pelzl , Christine Priplata , Colin Stahlke SHARK: A Realizable Special Hardware Sieving Device for Factoring 1024-Bit Integers. [Citation Graph (0, 0)][DBLP ] CHES, 2005, pp:119-130 [Conf ] Kerstin Lemke , Kai Schramm , Christof Paar DPA on n-Bit Sized Boolean and Arithmetic Operations and Its Application to IDEA, RC6, and the HMAC-Construction. [Citation Graph (0, 0)][DBLP ] CHES, 2004, pp:205-219 [Conf ] Gerardo Orlando , Christof Paar A High Performance Reconfigurable Elliptic Curve Processor for GF(2m ). [Citation Graph (0, 0)][DBLP ] CHES, 2000, pp:41-56 [Conf ] Gerardo Orlando , Christof Paar A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware. [Citation Graph (0, 0)][DBLP ] CHES, 2001, pp:348-363 [Conf ] Jan Pelzl , Thomas J. Wollinger , Jorge Guajardo , Christof Paar Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves. [Citation Graph (0, 0)][DBLP ] CHES, 2003, pp:351-365 [Conf ] Werner Schindler , Kerstin Lemke , Christof Paar A Stochastic Model for Differential Side Channel Cryptanalysis. [Citation Graph (0, 0)][DBLP ] CHES, 2005, pp:30-46 [Conf ] Kai Schramm , Gregor Leander , Patrick Felke , Christof Paar A Collision-Attack on AES: Combining Side Channel- and Differential-Attack. [Citation Graph (0, 0)][DBLP ] CHES, 2004, pp:163-175 [Conf ] Sandeep Kumar , Christof Paar , Jan Pelzl , Gerd Pfeiffer , Manfred Schimmler Breaking Ciphers with COPACOBANA - A Cost-Optimized Parallel Code Breaker. [Citation Graph (0, 0)][DBLP ] CHES, 2006, pp:101-118 [Conf ] Benedikt Gierlichs , Kerstin Lemke-Rust , Christof Paar Templates vs. Stochastic Methods. [Citation Graph (0, 0)][DBLP ] CHES, 2006, pp:15-29 [Conf ] Daniel V. Bailey , Christof Paar Optimal Extension Fields for Fast Arithmetic in Public-Key Algorithms. [Citation Graph (0, 0)][DBLP ] CRYPTO, 1998, pp:472-485 [Conf ] Jorge Guajardo , Christof Paar Efficient Algorithms for Elliptic Curve Cryptosystems. [Citation Graph (0, 0)][DBLP ] CRYPTO, 1997, pp:342-356 [Conf ] E. Barteska , Christof Paar , Jan Pelzl , Volker Wittelsberger , Thomas J. Wollinger Case Study: Compiler Comparison for an Embedded Cryptographical Application. [Citation Graph (0, 0)][DBLP ] ESA/VLSI, 2004, pp:589-595 [Conf ] Guido Bertoni , Jorge Guajardo , Sandeep S. Kumar , Gerardo Orlando , Christof Paar , Thomas J. Wollinger Efficient GF(pm ) Arithmetic Architectures for Cryptographic Applications. [Citation Graph (0, 0)][DBLP ] CT-RSA, 2003, pp:158-175 [Conf ] Kai Schramm , Christof Paar Higher Order Masking of the AES. [Citation Graph (0, 0)][DBLP ] CT-RSA, 2006, pp:208-225 [Conf ] Christof Paar , Pedro Soria-Rodriguez Fast Arithmetic Architectures for Public-Key Algorithms over Galois Fields GF((2n )m ). [Citation Graph (0, 0)][DBLP ] EUROCRYPT, 1997, pp:363-378 [Conf ] Gerardo Orlando , Christof Paar A Super-Serial Galois Fields Multiplier for FPGAs and its Application to Public-Key Algorithms. [Citation Graph (0, 0)][DBLP ] FCCM, 1999, pp:232-239 [Conf ] Christof Paar , Martin Rosner Comparison of arithmetic architectures for Reed-Solomon decoders in reconfigurable hardware. [Citation Graph (0, 0)][DBLP ] FCCM, 1997, pp:219-225 [Conf ] Andrey Bogdanov , M. C. Mertens A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2). [Citation Graph (0, 0)][DBLP ] FCCM, 2006, pp:237-248 [Conf ] Sandeep Kumar , Christof Paar , Jan Pelzl , Gerd Pfeiffer , Manfred Schimmler COPACOBANA A Cost-Optimized Special-Purpose Hardware for Code-Breaking. [Citation Graph (0, 0)][DBLP ] FCCM, 2006, pp:311-312 [Conf ] Kerstin Lemke-Rust , Christof Paar An Adversarial Model for Fault Analysis Against Low-Cost Cryptographic Devices. [Citation Graph (0, 0)][DBLP ] FDTC, 2006, pp:131-143 [Conf ] Adam J. Elbirt , Christof Paar An FPGA implementation and performance evaluation of the Serpent block cipher. [Citation Graph (0, 0)][DBLP ] FPGA, 2000, pp:33-40 [Conf ] Tim Gueneysu , Christof Paar , Jan Pelzl Attacking elliptic curve cryptosystems with special-purpose hardware. [Citation Graph (0, 0)][DBLP ] FPGA, 2007, pp:207-215 [Conf ] David Narh Amanor , Viktor Bunimov , Christof Paar , Jan Pelzl , Manfred Schimmler Efficient Hardware Architectures for Modular Multiplication on FPGAs. [Citation Graph (0, 0)][DBLP ] FPL, 2005, pp:539-542 [Conf ] Sandeep S. Kumar , Christof Paar Reconfigurable Instruction Set Extension for Enabling ECC on an 8-Bit Processor. [Citation Graph (0, 0)][DBLP ] FPL, 2004, pp:586-595 [Conf ] Thomas J. Wollinger , Christof Paar How Secure Are FPGAs in Cryptographic Applications? [Citation Graph (0, 0)][DBLP ] FPL, 2003, pp:91-100 [Conf ] Kai Schramm , Thomas J. Wollinger , Christof Paar A New Class of Collision Attacks and Its Application to DES. [Citation Graph (0, 0)][DBLP ] FSE, 2003, pp:206-222 [Conf ] Christof Paar , Thomas J. Wollinger Eingebettete Sicherheit und Kryptographie im Automobil: Eine Einführung. [Citation Graph (0, 0)][DBLP ] GI Jahrestagung (1), 2003, pp:325-329 [Conf ] Thomas J. Wollinger , Guido Bertoni , Luca Breveglieri , Christof Paar Performance of HECC Coprocessors Using Inversion-Free Formulae. [Citation Graph (0, 0)][DBLP ] ICCSA (3), 2006, pp:1004-1012 [Conf ] Adam J. Elbirt , Christof Paar Instruction-Level Distributed Processing for Symmetric-Key Cryptography. [Citation Graph (0, 0)][DBLP ] IPDPS, 2003, pp:78- [Conf ] Guido Bertoni , Luca Breveglieri , Thomas J. Wollinger , Christof Paar Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. [Citation Graph (0, 0)][DBLP ] ITCC (2), 2004, pp:538-0 [Conf ] Jan Pelzl , Thomas J. Wollinger , Christof Paar High Performance Arithmetic for special Hyperelliptic Curve Cryptosystems of Genus Two. [Citation Graph (0, 0)][DBLP ] ITCC (2), 2004, pp:513-517 [Conf ] Kai Schramm , Christof Paar IT Security Project: Implementation of the Advanced Encryption Standard (AES) on a Smart Card. [Citation Graph (0, 0)][DBLP ] ITCC (1), 2004, pp:176-180 [Conf ] Adam J. Elbirt , Christof Paar Efficient Implementation of Galois Field Fixed Field Constant Multiplication. [Citation Graph (0, 0)][DBLP ] ITNG, 2006, pp:172-177 [Conf ] Jorge Guajardo , Rainer Blümel , Uwe Krieger , Christof Paar Efficient Implementation of Elliptic Curve Cryptosystems on the TI MSP 430x33x Family of Microcontrollers. [Citation Graph (0, 0)][DBLP ] Public Key Cryptography, 2001, pp:365-382 [Conf ] Jens-Peter Kaps , Christof Paar Fast DES Implementation for FPGAs and Its Application to a Universal Key-Search Machine. [Citation Graph (0, 0)][DBLP ] Selected Areas in Cryptography, 1998, pp:234-247 [Conf ] Jan Pelzl , Thomas J. Wollinger , Christof Paar Low Cost Security: Explicit Formulae for Genus-4 Hyperelliptic Curves. [Citation Graph (0, 0)][DBLP ] Selected Areas in Cryptography, 2003, pp:1-16 [Conf ] Marko Wolf , André Weimerskirch , Christof Paar Digital Rights Management Systeme (DRMS) als Enabling Technology im Automobil. [Citation Graph (0, 0)][DBLP ] Sicherheit, 2005, pp:193-196 [Conf ] Howon Kim , Thomas J. Wollinger , Yongje Choi , Kyoil Chung , Christof Paar Hyperelliptic Curve Coprocessors on a FPGA. [Citation Graph (0, 0)][DBLP ] WISA, 2004, pp:360-374 [Conf ] Jorge Guajardo , Christof Paar Itoh-Tsujii Inversion in Standard Basis and Its Application in Cryptography and Codes. [Citation Graph (0, 0)][DBLP ] Des. Codes Cryptography, 2002, v:25, n:2, pp:207-216 [Journal ] Jens-Peter Kaps , Christof Paar DES auf FPGAs - Hochgeschwindigkeits-Architekturen für den Data Encryption Standard auf rekonfigurierbarer Hardware. [Citation Graph (0, 0)][DBLP ] Datenschutz und Datensicherheit, 1999, v:23, n:9, pp:- [Journal ] Christof Paar Algorithmenunabhängige Krypto-Hardware - Moderne Sicherheitsprotokolle erfordern den Wechsel zwischen kryptographischen Algorithmen. [Citation Graph (0, 0)][DBLP ] Datenschutz und Datensicherheit, 1999, v:23, n:9, pp:- [Journal ] Daniel V. Bailey , Christof Paar Efficient Arithmetic in Finite Field Extensions with Application in Elliptic Curve Cryptography. [Citation Graph (0, 0)][DBLP ] J. Cryptology, 2001, v:14, n:3, pp:153-176 [Journal ] Thomas Blum , Christof Paar High-Radix Montgomery Modular Exponentiation on Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2001, v:50, n:7, pp:759-764 [Journal ] Çetin Kaya Koç , Christof Paar Guest Editors' Introduction to the Special Section on Cryptographic Hardware and Embedded Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2003, v:52, n:4, pp:401-402 [Journal ] Sandeep Kumar , Thomas J. Wollinger , Christof Paar Optimum Digit Serial GF(2^m) Multipliers for Curve-Based Cryptography. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2006, v:55, n:10, pp:1306-1311 [Journal ] Christof Paar A New Architecture for a Parallel Finite Field Multiplier with Low Complexity Based on Composite Fields. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:7, pp:856-861 [Journal ] Christof Paar , Peter Fleischmann , Peter Roelse Efficient Multiplier Architectures for Galois Fields GF(2 4n ). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1998, v:47, n:2, pp:162-170 [Journal ] Christof Paar , Peter Fleischmann , Pedro Soria-Rodriguez Fast Arithmetic for Public-Key Algorithms in Galois Fields with Composite Exponents. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1999, v:48, n:10, pp:1025-1034 [Journal ] Thomas J. Wollinger , Jan Pelzl , Christof Paar Cantor versus Harley: Optimization and Analysis of Explicit Formulae for Hyperelliptic Curve Cryptosystems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2005, v:54, n:7, pp:861-872 [Journal ] Thomas J. Wollinger , Jorge Guajardo , Christof Paar Security on FPGAs: State-of-the-art implementations and attacks. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2004, v:3, n:3, pp:534-574 [Journal ] Thomas J. Wollinger , Jan Pelzl , Volker Wittelsberger , Christof Paar , Gökay Saldamli , Çetin Kaya Koç Elliptic and hyperelliptic curves on embedded µP. [Citation Graph (0, 0)][DBLP ] ACM Trans. Embedded Comput. Syst., 2004, v:3, n:3, pp:509-533 [Journal ] Adam J. Elbirt , Christof Paar An Instruction-Level Distributed Processor for Symmetric-Key Cryptography. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 2005, v:16, n:5, pp:468-480 [Journal ] Kerstin Lemke-Rust , Christof Paar Gaussian Mixture Models for Higher-Order Side Channel Analysis. [Citation Graph (0, 0)][DBLP ] CHES, 2007, pp:14-27 [Conf ] Andrey Bogdanov , Lars R. Knudsen , Gregor Leander , Christof Paar , Axel Poschmann , Matthew J. B. Robshaw , Yannick Seurin , C. Vikkelsoe PRESENT: An Ultra-Lightweight Block Cipher. [Citation Graph (0, 0)][DBLP ] CHES, 2007, pp:450-466 [Conf ] Leif Uhsadel , Axel Poschmann , Christof Paar Enabling Full-Size Public-Key Algorithms on 8-Bit Sensor Nodes. [Citation Graph (0, 0)][DBLP ] ESAS, 2007, pp:73-86 [Conf ] Kerstin Lemke-Rust , Christof Paar Analyzing Side Channel Leakage of Masked Implementations with Stochastic Methods. [Citation Graph (0, 0)][DBLP ] ESORICS, 2007, pp:454-468 [Conf ] Gregor Leander , Christof Paar , Axel Poschmann , Kai Schramm New Lightweight DES Variants. [Citation Graph (0, 0)][DBLP ] FSE, 2007, pp:196-210 [Conf ] Axel Poschmann , Gregor Leander , Kai Schramm , Christof Paar New Light-Weight Crypto Algorithms for RFID. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:1843-1846 [Conf ] Yifei Liu , Timo Kasper , Kerstin Lemke-Rust , Christof Paar E-Passport: Cracking Basic Access Control Keys. [Citation Graph (0, 0)][DBLP ] OTM Conferences (2), 2007, pp:1531-1547 [Conf ] Francesco Regazzoni , Stéphane Badel , Thomas Eisenbarth , Johann Großschädl , Axel Poschmann , Zeynep Toprak Deniz , Marco Macchetti , Laura Pozzi , Christof Paar , Yusuf Leblebici , Paolo Ienne A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. [Citation Graph (0, 0)][DBLP ] ICSAMOS, 2007, pp:209-214 [Conf ] Dario Carluccio , Kerstin Lemke-Rust , Christof Paar , Ahmad-Reza Sadeghi E-Passport: The Global Traceability Or How to Feel Like a UPS Package. [Citation Graph (0, 0)][DBLP ] WISA, 2006, pp:391-404 [Conf ] Timo Kasper , Dario Carluccio , Christof Paar An Embedded System for Practical Security Analysis of Contactless Smartcards. [Citation Graph (0, 0)][DBLP ] WISTP, 2007, pp:150-160 [Conf ] Adam J. Elbirt , W. Yip , B. Chetwynd , Christof Paar An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2001, v:9, n:4, pp:545-557 [Journal ] Fast Hash-Based Signatures on Constrained Devices. [Citation Graph (, )][DBLP ] Ultra-Lightweight Implementations for Smart Devices - Security for 1000 Gate Equivalents. [Citation Graph (, )][DBLP ] Reconfigurable trusted computing in hardware. [Citation Graph (, )][DBLP ] Hash Functions and RFID Tags: Mind the Gap. [Citation Graph (, )][DBLP ] Ultra High Performance ECC over NIST Primes on Commercial FPGAs. [Citation Graph (, )][DBLP ] Crypto Engineering: Some History and Some Case Studies. [Citation Graph (, )][DBLP ] MicroEliece: McEliece for Embedded Devices. [Citation Graph (, )][DBLP ] Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering. [Citation Graph (, )][DBLP ] On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoqCode Hopping Scheme. [Citation Graph (, )][DBLP ] Differential Cache-Collision Timing Attacks on AES with Applications to Embedded CPUs. [Citation Graph (, )][DBLP ] Secure Location Verification - A Security Analysis of GPS Signal Authentication. [Citation Graph (, )][DBLP ] Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits. [Citation Graph (, )][DBLP ] Breaking Legacy Banking Standards with Special-Purpose Hardware. [Citation Graph (, )][DBLP ] All You Can Eat or Breaking a Real-World Contactless Payment System. [Citation Graph (, )][DBLP ] New Protection Mechanisms for Intellectual Property in Reconfigurable Logic. [Citation Graph (, )][DBLP ] Establishing Chain of Trust in Reconfigurable Hardware. [Citation Graph (, )][DBLP ] DSPs, BRAMs and a Pinch of Logic: New Recipes for AES on FPGAs. [Citation Graph (, )][DBLP ] KeeLoq and Side-Channel Analysis-Evolution of an Attack. [Citation Graph (, )][DBLP ] Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis. [Citation Graph (, )][DBLP ] Hardware Optimierte Leichtgewichtige Blockchiffren für RFID- und Sensor-Systeme. [Citation Graph (, )][DBLP ] MOLES: Malicious off-chip leakage enabled by side-channels. [Citation Graph (, )][DBLP ] Lightweight Cryptography and RFID: Tackling the Hidden Overheads. [Citation Graph (, )][DBLP ] Power Analysis of Single-Rail Storage Elements as Used in MDPL. [Citation Graph (, )][DBLP ] Parallel Computing with Low-Cost FPGAs: A Framework for COPACOBANA. [Citation Graph (, )][DBLP ] One-touch Financial Transaction Authentication. [Citation Graph (, )][DBLP ] Security Requirements Engineering in the Automotive Domain: On Specification Procedures and Implementation Aspects. [Citation Graph (, )][DBLP ] Efficient Hash Collision Search Strategies on Special-Purpose Hardware. [Citation Graph (, )][DBLP ] EM Side-Channel Attacks on Commercial Contactless Smartcards Using Low-Cost Equipment. [Citation Graph (, )][DBLP ] A Comparative Study of Mutual Information Analysis under a Gaussian Assumption. [Citation Graph (, )][DBLP ] Efficient implementation of eSTREAM ciphers on 8-bit AVR microcontrollers. [Citation Graph (, )][DBLP ] Comparison of innovative signature algorithms for WSNs. [Citation Graph (, )][DBLP ] Breaking KeeLoq in a Flash: On Extracting Keys at Lightning Speed. [Citation Graph (, )][DBLP ] Secure IP-Block Distribution for Hardware Devices. [Citation Graph (, )][DBLP ] Practical Power Analysis Attacks on Software Implementations of McEliece. [Citation Graph (, )][DBLP ] A Survey of Lightweight-Cryptography Implementations. [Citation Graph (, )][DBLP ] Search in 0.012secs, Finished in 0.015secs