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Gary Lauterbach: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Gary Lauterbach
    Accelerating Architectural Simulation by Parallel Execution of Trace Samples. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:205-210 [Conf]
  2. Robert J. Drost, Craig Forrest, Bruce Guenin, Ron Ho, Ashok V. Krishnamoorthy, Danny Cohen, John E. Cunningham, Bernard Tourancheau, Arthur Zingher, Alex Chow, Gary Lauterbach, Ivan E. Sutherland
    Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication. [Citation Graph (0, 0)][DBLP]
    Hot Interconnects, 2005, pp:13-22 [Conf]
  3. William L. Lynch, Gary Lauterbach, Joseph I. Chamdani
    Low Load Latency Through Sum-Addressed Memory (SAM). [Citation Graph (0, 0)][DBLP]
    ISCA, 1998, pp:369-379 [Conf]
  4. Ilya Sharapov, Gary Lauterbach, Stephen P. Crago
    Robust Highly-Connected Direct Interconnection Network Topologies. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:995-1000 [Conf]
  5. Gary Lauterbach
    Vying for the Lead in High-Performance Processors (Interview). [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1999, v:32, n:6, pp:38-41 [Journal]

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