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Bruce K. Holmer: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Valerie E. Taylor, Bruce K. Holmer, Eric J. Schwabe, Michelle R. Hribar
    Balancing Load versus Decreasing Communication: Exploring the Tradeoffs. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1996, pp:585-593 [Conf]
  2. Eric J. Schwabe, Ian M. Sutherland, Bruce K. Holmer
    Evaluating Approximately Balanced Parity-declustered Data Layouts for Disk Arrays. [Citation Graph (0, 0)][DBLP]
    IOPADS, 1996, pp:41-54 [Conf]
  3. Bruce K. Holmer, Barton Sano, Michael J. Carlton, Peter Van Roy, Ralph Clarke Haygood, William R. Bush, Alvin M. Despain, Joan M. Pendleton, Tep P. Dobry
    Fast Prolog with an Extended General Purpose Architecture. [Citation Graph (0, 0)][DBLP]
    ISCA, 1990, pp:282-291 [Conf]
  4. Bruce K. Holmer, Alvin M. Despain
    Viewing Instruction Set Design as an Optimization Problem. [Citation Graph (0, 0)][DBLP]
    MICRO, 1991, pp:153-162 [Conf]
  5. Jonathan P. Vogel, Bruce K. Holmer
    Analysis of the conditional skip instructions of the HP precision architecture. [Citation Graph (0, 0)][DBLP]
    MICRO, 1994, pp:207-216 [Conf]
  6. Bruce K. Holmer, Barton Sano, Michael J. Carlton, Peter Van Roy, Alvin M. Despain
    Design and Analysis of Hardware for High-Performance Prolog. [Citation Graph (0, 0)][DBLP]
    J. Log. Program., 1996, v:29, n:1-3, pp:107-139 [Journal]
  7. Valerie E. Taylor, Eric J. Schwabe, Bruce K. Holmer, Michelle R. Hribar
    Balancing Load versus Decreasing Communication: Parameterizing the Tradeoff. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2001, v:61, n:5, pp:567-580 [Journal]
  8. Vason P. Srini, Tam M. Nguyen, Darren R. Busing, Michael J. Carlton, Bruce K. Holmer, Georges E. Smine, Alvin M. Despain
    Design and Simulation of the Aquarius-II Multiprocessor. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Integration, 1997, v:7, n:2, pp:151-178 [Journal]
  9. Eric J. Schwabe, Ian M. Sutherland, Bruce K. Holmer
    Evaluating Approximately Balanced Parity-Declustered Data Layouts for Disk Arrays. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1997, v:23, n:4-5, pp:501-523 [Journal]

  10. A tool for processor instruction set design. [Citation Graph (, )][DBLP]


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