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Raúl Martínez:
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- Raúl Martínez, Francisco José Alfaro, José L. Sánchez
Improving the Flexibility of the Deficit Table Scheduler. [Citation Graph (0, 0)][DBLP] HiPC, 2006, pp:84-97 [Conf]
- Thomas Sødring, Raúl Martínez, Geir Horn
A Statistical Approach to Traffic Management in Source Routed Loss-Less Networks. [Citation Graph (0, 0)][DBLP] HPCC, 2006, pp:190-199 [Conf]
- Raúl Martínez, Francisco José Alfaro, José L. Sánchez
Providing Quality of Service over Advanced Switching. [Citation Graph (0, 0)][DBLP] ICPADS (1), 2006, pp:223-234 [Conf]
- Raúl Martínez, Francisco José Alfaro, José L. Sánchez
Decoupling the Bandwidth and Latency Bounding for Table-based Schedulers. [Citation Graph (0, 0)][DBLP] ICPP, 2006, pp:155-163 [Conf]
- Juan D. Gispert, Javier Pascau, Santiago Reig, Raúl Martinez, Vicente Molina, Manuel Desco
Effect of the normalization template in statistical parametric mapping of PET scans. [Citation Graph (0, 0)][DBLP] ISBI, 2002, pp:851-854 [Conf]
- Raúl Martínez, Francisco José Alfaro, José L. Sánchez
Studying Several Proposals for the Adaptation of the DTable Scheduler to Advanced Switching. [Citation Graph (0, 0)][DBLP] ISPA, 2006, pp:98-112 [Conf]
- Raúl Martínez, José L. Sánchez, Francisco José Alfaro, Vicente Chirivella, Jose Flich
Studying the Effect of the Design Parameters on the Interconnection Network Performance in NOWs. [Citation Graph (0, 0)][DBLP] PDP, 2005, pp:102-109 [Conf]
- Raúl Martínez, Francisco José Alfaro, José L. Sánchez
Comparing the latency performance of the DTable and DRR schedulers. [Citation Graph (0, 0)][DBLP] IPDPS, 2007, pp:1-8 [Conf]
- Raúl Martínez, Francisco José Alfaro, José L. Sánchez
Implementing the Advanced Switching Minimum Bandwidth Egress Link Scheduler. [Citation Graph (0, 0)][DBLP] NCA, 2006, pp:118-125 [Conf]
- Alejandro Martínez, Raúl Martínez, Francisco José Alfaro, José L. Sánchez
A low-cost strategy to provide full QoS support in Advanced Switching networks. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 2007, v:53, n:7, pp:355-368 [Journal]
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. [Citation Graph (, )][DBLP]
Hardware Implementation Study of the SCFQ-CA and DRR-CA Scheduling Algorithms. [Citation Graph (, )][DBLP]
Hardware Implementation Study of the Deficit Table Egress Link Scheduling Algorithm. [Citation Graph (, )][DBLP]
Boosting single-thread performance in multi-core systems through fine-grain multi-threading. [Citation Graph (, )][DBLP]
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