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Jung Ho Ahn: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jung Ho Ahn, Mattan Erez, William J. Dally
    Scatter-Add in Data Parallel Architectures. [Citation Graph (0, 0)][DBLP]
    HPCA, 2005, pp:132-142 [Conf]
  2. Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William J. Dally
    Stream Register Files with Indexed Access. [Citation Graph (0, 0)][DBLP]
    HPCA, 2004, pp:60-72 [Conf]
  3. Jung Ho Ahn, William J. Dally, Brucek Khailany, Ujval J. Kapasi, Abhishek Das
    Evaluating the Imagine Stream Architecture. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:14-25 [Conf]
  4. William J. Dally, Francois Labonte, Abhishek Das, Pat Hanrahan, Jung Ho Ahn, Jayanth Gummaraju, Mattan Erez, Nuwan Jayasena, Ian Buck, Timothy J. Knight, Ujval J. Kapasi
    Merrimac: Supercomputing with Streams. [Citation Graph (0, 0)][DBLP]
    SC, 2003, pp:35- [Conf]
  5. Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. Dally, Eric Darve
    Analysis and Performance Results of a Molecular Modeling Application on Merrimac. [Citation Graph (0, 0)][DBLP]
    SC, 2004, pp:42- [Conf]
  6. Jung Ho Ahn, Mattan Erez, William J. Dally
    Architecture - The design space of data-parallel memory systems. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:80- [Conf]
  7. Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter R. Mattson, John D. Owens
    Programmable Stream Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2003, v:36, n:8, pp:54-62 [Journal]
  8. William J. Dally, Ujval J. Kapasi, Brucek Khailany, Jung Ho Ahn, Abhishek Das
    Stream Processors: Progammability and Efficiency. [Citation Graph (0, 0)][DBLP]
    ACM Queue, 2004, v:2, n:1, pp:52-62 [Journal]
  9. Jung Ho Ahn, Mattan Erez, William J. Dally
    Tradeoff between data-, instruction-, and thread-level parallelism in stream processors. [Citation Graph (0, 0)][DBLP]
    ICS, 2007, pp:126-137 [Conf]
  10. Mattan Erez, Jung Ho Ahn, Jayanth Gummaraju, Mendel Rosenblum, William J. Dally
    Executing irregular scientific applications on stream architectures. [Citation Graph (0, 0)][DBLP]
    ICS, 2007, pp:93-104 [Conf]

  11. A Nanophotonic Interconnect for High-Performance Many-Core Computation. [Citation Graph (, )][DBLP]


  12. Corona: System Implications of Emerging Nanophotonic Technology. [Citation Graph (, )][DBLP]


  13. A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies. [Citation Graph (, )][DBLP]


  14. Replication-aware leakage management in chip multiprocessors with private L2 cache. [Citation Graph (, )][DBLP]


  15. McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. [Citation Graph (, )][DBLP]


  16. Future scaling of processor-memory interfaces. [Citation Graph (, )][DBLP]


  17. HyperX: topology, routing, and packaging of efficient large-scale networks. [Citation Graph (, )][DBLP]


  18. Data parallel address architecture. [Citation Graph (, )][DBLP]


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