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Publications of Author

1. Murali Annavaram, Jignesh M. Patel, Edward S. Davidson
   Call Graph Prefetching for Database Applications. [Citation Graph (0, 0)][DBLP]
   HPCA, 2001, pp:281-0 [Conf]
   
2. Murali Annavaram, Trung A. Diep, John Paul Shen
   Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors. [Citation Graph (0, 0)][DBLP]
   ICCD, 2002, pp:242-248 [Conf]
   
3. Murali Annavaram, Jignesh M. Patel, Edward S. Davidson
   Data prefetching by dependence graph precomputation. [Citation Graph (0, 0)][DBLP]
   ISCA, 2001, pp:52-61 [Conf]
   
4. Murali Annavaram, Ed Grochowski, John Paul Shen
   Mitigating Amdahl's Law through EPI Throttling. [Citation Graph (0, 0)][DBLP]
   ISCA, 2005, pp:298-309 [Conf]
   
5. Murali Annavaram, Ryan Rakvic, Marzia Polito, Jean-Yves Bouguet, Richard A. Hankins, Bob Davies
   The Fuzzy Correlation between Code and Performance Predictability. [Citation Graph (0, 0)][DBLP]
   MICRO, 2004, pp:93-104 [Conf]
   
6. Richard A. Hankins, Trung A. Diep, Murali Annavaram, Brian Hirano, Harald Eri, Hubert Nueckel, John Paul Shen
   Scaling and Charact rizing Database Workloads: Bridging the Gap between Research and Practice. [Citation Graph (0, 0)][DBLP]
   MICRO, 2003, pp:151-164 [Conf]
   
7. Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Pat Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Shen, Clair Webb
   Die Stacking (3D) Microarchitecture. [Citation Graph (0, 0)][DBLP]
   MICRO, 2006, pp:469-479 [Conf]
   
8. Partha Kundu, Murali Annavaram, Trung A. Diep, John Shen
   A case for shared instruction cache on chip multiprocessors running OLTP. [Citation Graph (0, 0)][DBLP]
   SIGARCH Computer Architecture News, 2004, v:32, n:3, pp:11-18 [Journal]
   
9. Murali Annavaram, Jignesh M. Patel, Edward S. Davidson
   Call graph prefetching for database applications. [Citation Graph (0, 0)][DBLP]
   ACM Trans. Comput. Syst., 2003, v:21, n:4, pp:412-444 [Journal]
   
10. 
    Optimal Allocation of Time-Resources for Multihypothesis Activity-Level Detection. [Citation Graph (, )][DBLP]
    
    
11. 
    Implications of Device Timing Variability on Full Chip Timing. [Citation Graph (, )][DBLP]
    
    
12. 
    Exploiting Simulation Slack to Improve Parallel Simulation Speed. [Citation Graph (, )][DBLP]
    
    
13. 
    Markov-optimal sensing policy for user state estimation in mobile devices. [Citation Graph (, )][DBLP]
    
    
14. 
    Implications of device timing variability on full chip timing. [Citation Graph (, )][DBLP]
    
    
15. 
    Virtual trip lines for distributed privacy-preserving traffic monitoring. [Citation Graph (, )][DBLP]
    
    
16. 
    A framework of energy efficient mobile sensing for automatic user state recognition. [Citation Graph (, )][DBLP]
    
    
17. 
    Game theoretic approach to location sharing with privacy in a community-based mobile safety application. [Citation Graph (, )][DBLP]