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Ryan Rakvic: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ryan Rakvic, Bryan Black, Deepak Limaye, John Paul Shen
    Non-Vital Loads. [Citation Graph (0, 0)][DBLP]
    HPCA, 2002, pp:165-0 [Conf]
  2. Deepak Limaye, Ryan Rakvic, John Paul Shen
    Parallel Cachelets. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:284-292 [Conf]
  3. Bryan Black, Brian Mueller, Stephanie Postal, Ryan Rakvic, Noppanunt Utamaphethai, John Paul Shen
    Load Execution Latency Reduction. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:29-36 [Conf]
  4. Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan Rakvic, Hong Wang, John Paul Shen
    Multiple Instruction Stream Processor. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:114-127 [Conf]
  5. Ryan Rakvic, Bryan Black, John Paul Shen
    Completion time multiple branch prediction for enhancing trace cache performance. [Citation Graph (0, 0)][DBLP]
    ISCA, 2000, pp:47-58 [Conf]
  6. Murali Annavaram, Ryan Rakvic, Marzia Polito, Jean-Yves Bouguet, Richard A. Hankins, Bob Davies
    The Fuzzy Correlation between Code and Performance Predictability. [Citation Graph (0, 0)][DBLP]
    MICRO, 2004, pp:93-104 [Conf]
  7. Youfeng Wu, Ryan Rakvic, Li-Ling Chen, Chyi-Chang Miao, George Chrysos, Jesse Fang
    Compiler managed micro-cache bypassing for high performance EPIC processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:134-145 [Conf]

  8. A comprehensive study of hardware/software approaches to improve TLB performance for java applications on embedded systems. [Citation Graph (, )][DBLP]


  9. Meeting points: using thread criticality to adapt multicore hardware to parallel regions. [Citation Graph (, )][DBLP]


  10. Thread fusion. [Citation Graph (, )][DBLP]


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