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Mikel Luján: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Anila Usman, Mikel Luján, Len Freeman, John R. Gurd
    Performance Evaluation of Storage Formats for Sparse Matrices in Fortran. [Citation Graph (0, 0)][DBLP]
    HPCC, 2006, pp:160-169 [Conf]
  2. Mikel Luján, Anila Usman, Patrick Hardie, T. L. Freeman, John R. Gurd
    Storage Formats for Sparse Matrices in Java. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2005, pp:364-371 [Conf]
  3. Mikel Luján, John R. Gurd, T. L. Freeman, José Miguel
    Elimination of Java array bounds checks in the presence of indirection. [Citation Graph (0, 0)][DBLP]
    Java Grande, 2002, pp:76-85 [Conf]
  4. Mikel Luján, T. L. Freeman, John R. Gurd
    OoLALA: an object oriented analysis and design of numerical linear algebra. [Citation Graph (0, 0)][DBLP]
    OOPSLA, 2000, pp:229-252 [Conf]
  5. Mikel Luján, Gibson Mukarakate, John R. Gurd, T. L. Freeman
    DIFOJO: A Java Fork/Join Framework for Heterogeneous Networks. [Citation Graph (0, 0)][DBLP]
    PDP, 2005, pp:297-304 [Conf]
  6. Christopher W. Armstrong, Rupert W. Ford, John R. Gurd, Mikel Luján, Kenneth R. Mayes, Graham D. Riley
    Performance control of scientific coupled models in Grid environments. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 2005, v:17, n:2-4, pp:259-295 [Journal]
  7. Mikel Luján, T. L. Freeman, John R. Gurd
    On the conditions necessary for removing abstraction penalties in OOLALA. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 2005, v:17, n:7-8, pp:839-866 [Journal]
  8. Mikel Luján, John R. Gurd, T. L. Freeman, José Miguel
    Elimination of Java array bounds checks in the presence of indirection. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 2005, v:17, n:5-6, pp:489-514 [Journal]
  9. Mikel Luján, Phyllis Gustafson, Michael Paleczny, Christopher A. Vick
    Speculative Parallelization - Eliminating the Overhead of Failure. [Citation Graph (0, 0)][DBLP]
    HPCC, 2007, pp:460-471 [Conf]
  10. Mohamed Hussein, Kenneth R. Mayes, Mikel Luján, John R. Gurd
    Adaptive performance control for distributed scientific coupled models. [Citation Graph (0, 0)][DBLP]
    ICS, 2007, pp:274-283 [Conf]
  11. Jeremy Singer, Gavin Brown, Mikel Luján, Ian Watson
    Towards intelligent analysis techniques for object pretenuring. [Citation Graph (0, 0)][DBLP]
    PPPJ, 2007, pp:203-208 [Conf]

  12. A Study of a Transactional Parallel Routing Algorithm. [Citation Graph (, )][DBLP]


  13. SpiNNaker: impact of traffic locality, causality and burstiness on the performance of the interconnection network. [Citation Graph (, )][DBLP]


  14. Efficient parallel implementation of multilayer backpropagation networks on SpiNNaker. [Citation Graph (, )][DBLP]


  15. Advanced Concurrency Control for Transactional Memory Using Transaction Commit Rate. [Citation Graph (, )][DBLP]


  16. Scalable Object-Aware Hardware Transactional Memory. [Citation Graph (, )][DBLP]


  17. Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering. [Citation Graph (, )][DBLP]


  18. Improving Performance by Reducing Aborts in Hardware Transactional Memory. [Citation Graph (, )][DBLP]


  19. An Object-Aware Hardware Transactional Memory System. [Citation Graph (, )][DBLP]


  20. Lee-TM: A Non-trivial Benchmark Suite for Transactional Memory. [Citation Graph (, )][DBLP]


  21. Adaptive Loop Tiling for a Multi-cluster CMP. [Citation Graph (, )][DBLP]


  22. Introducing Aspects to the Implementation of a Java Fork/Join Framework. [Citation Graph (, )][DBLP]


  23. DiSTM: A Software Transactional Memory Framework for Clusters. [Citation Graph (, )][DBLP]


  24. Understanding the interconnection network of SpiNNaker. [Citation Graph (, )][DBLP]


  25. Investigating software Transactional Memory on clusters. [Citation Graph (, )][DBLP]


  26. On the Performance of Contention Managers for Complex Transactional Memory Benchmarks. [Citation Graph (, )][DBLP]


  27. Event-Driven Configuration of a Neural Network CMP System over a Homogeneous Interconnect Fabric. [Citation Graph (, )][DBLP]


  28. Algorithm for Mapping Multilayer BP Networks onto the SpiNNaker Neuromorphic Hardware. [Citation Graph (, )][DBLP]


  29. The economics of garbage collection. [Citation Graph (, )][DBLP]


  30. Online Non-stationary Boosting. [Citation Graph (, )][DBLP]


  31. Profiling Transactional Memory Applications. [Citation Graph (, )][DBLP]


  32. Experiences using adaptive concurrency in transactional memory with Lee's routing algorithm. [Citation Graph (, )][DBLP]


  33. A first insight into object-aware hardware transactional memory. [Citation Graph (, )][DBLP]


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