Search the dblp DataBase

Publications of Author

1. Dae-Ik Kim, Sung-Hwan Bae, Mike Myung-Ok Lee, Jin-Gyun Chung
   Area Efficient and Low Power Pipelined IIR Filter Design for Intelligent Integrated Photonic System. [Citation Graph (0, 0)][DBLP]
   HSNMC, 2004, pp:842-847 [Conf]
   
2. Jin-Gyun Chung, Keshab K. Parhi
   The scaled normalized lattice digital filter. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1993, pp:483-486 [Conf]
   
3. Jin-Gyun Chung, Keshab K. Parhi
   Synthesis and Pipelining of Ladder Wave Digital Filters in Digital Domain. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1995, pp:77-80 [Conf]
   
4. Hojun Kim, Jin-Gyun Chung
   Minimizing switching activity in input word by offset and its low power applications for FIR filters. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:297-300 [Conf]
   
5. Ji-Suk Park, Byeong-Kuk Kim, Jin-Gyun Chung, Keshab K. Parhi
   High-speed tunable fractional-delay allpass filter structure. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2003, pp:165-168 [Conf]
   
6. Ki-Cheol Tae, Jin-Gyun Chung, Dae-Ik Kim
   Noise generation system using DCT. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2001, pp:29-32 [Conf]
   
7. Sang-Min Kim, Jin-Gyun Chung, Keshab K. Parhi
   Design of low error CSD fixed-width multiplier. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2002, pp:69-72 [Conf]
   
8. Kyung-Ju Cho, Kwang-Chul Lee, Jin-Gyun Chung, Keshab K. Parhi
   Design of low-error fixed-width modified booth multiplier. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2004, v:12, n:5, pp:522-531 [Journal]
   
9. 
   Modified CSD group multiplier design for predetermined coefficient groups. [Citation Graph (, )][DBLP]
   
   
10. 
    Hardware Efficient QR Decomposition for GDFE. [Citation Graph (, )][DBLP]
    
    
11. 
    Efficient Squarer Design Using Group Partial Products. [Citation Graph (, )][DBLP]