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Anu G. Bourgeois: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Arthi Hariharan, Sushil K. Prasad, Anu G. Bourgeois, Erdogan Dogdu, Shamkant B. Navathe, Raj Sunderraman, Yi Pan
    A Framework for Constraint-Based Collaborative Web Service Applications and A Travel Application Case Study. [Citation Graph (0, 0)][DBLP]
    International Conference on Internet Computing, 2004, pp:866-872 [Conf]
  2. Feng Tan, Xuezheng Fu, Hao Wang, Yanqing Zhang, Anu G. Bourgeois
    A Hybrid Feature Selection Approach for Microarray Gene Expression Data. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (2), 2006, pp:678-685 [Conf]
  3. Sushil K. Prasad, Anu G. Bourgeois, Erdogan Dogdu, Raj Sunderraman, Yi Pan, Shamkant B. Navathe, Vijay K. Madisetti
    Enforcing Interdependencies and Executing Transactions Atomically over Autonomous Mobile Data Stores Using SyD Link Technology. [Citation Graph (0, 0)][DBLP]
    ICDCS Workshops, 2003, pp:803-0 [Conf]
  4. Ken D. Nguyen, Anu G. Bourgeois
    Ant Colony Optimal Algorithm: Fast Ants on the Optical Pipelined R-Mesh. [Citation Graph (0, 0)][DBLP]
    ICPP, 2006, pp:347-354 [Conf]
  5. Sushil K. Prasad, Anu G. Bourgeois, Praveen Madiraju, Srilaxmi Malladi, Janaka Balasooriya
    A Methodology for Engineering Collaborative Applications over Mobile Web Objects using SyD Middleware. [Citation Graph (0, 0)][DBLP]
    ICWS, 2005, pp:489-496 [Conf]
  6. Sharareh Babvey, José Alberto Fernández-Zepeda, Anu G. Bourgeois, Steven W. McLaughlin
    An Efficient R-Mesh Implementation of LDPC Codes Message-Passing Decoder. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  7. Anu G. Bourgeois, Jerry L. Trahan
    Fault Tolerant Algorithms for a Linear Array with a Reconfigurable Pipelined Bus System. [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:1044-1052 [Conf]
  8. Anu G. Bourgeois, Jerry L. Trahan
    Relating Two-Dimensional Reconfigurable Meshes with Optically Pipelined Buses. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2000, pp:747-752 [Conf]
  9. Alejandro Estrella-Balderrama, José Alberto Fernández-Zepeda, Anu G. Bourgeois
    Fault Tolerance and Scalability of the Reconfigurable Mesh. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  10. José Alberto Fernández-Zepeda, Daniel Fajardo-Delgado, José Antonio Cárdenas-Haro, Anu G. Bourgeois
    Efficient Simulation of the Acyclic DR-Mesh on the LR-Mesh. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  11. Xiannong Fu, Yi Pan, Anu G. Bourgeois, Pingzhi Fan
    A Three-Stage Heuristic Combined Genetic Algorithm Strategy to the Channel-Assignment Problem. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:145- [Conf]
  12. Sushil K. Prasad, Anu G. Bourgeois, Erdogan Dogdu, Raj Sunderraman, Yi Pan, Shamkant B. Navathe, Vijay K. Madisetti
    Implementation of a Calendar Application Based on SyD Coordination Links. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:242- [Conf]
  13. Jerry L. Trahan, Anu G. Bourgeois, Ramachandran Vaidyanathan, Yi Pan
    Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP, 1999, pp:233-0 [Conf]
  14. M. Gopalan, Anu G. Bourgeois, José Alberto Fernández-Zepeda
    Simulating a PR-mesh on an LARPBS. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  15. Sushil K. Prasad, Vijay K. Madisetti, Shamkant B. Navathe, Raj Sunderraman, Erdogan Dogdu, Anu G. Bourgeois, Michael Weeks, Bing Liu, Janaka Balasooriya, Arthi Hariharan, Wanxia Xie, Praveen Madiraju, Srilaxmi Malladi, Raghupathy Sivakumar, Alexander Zelikovsky, Yanqing Zhang, Yi Pan, Saeid Belkasim
    SyD: A Middleware Testbed for Collaborative Applications over Small Heterogeneous Devices and Data Stores. [Citation Graph (0, 0)][DBLP]
    Middleware, 2004, pp:352-371 [Conf]
  16. Anu G. Bourgeois, José Alberto Fernández-Zepeda
    Scalable Algorithms for Faulty R-Meshes. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:537-542 [Conf]
  17. Sharareh Babvey, Anu G. Bourgeois, José Alberto Fernández-Zepeda, Steven W. McLaughlin
    A Parallel Implementation of the Message-Passing Decoder of LDPC Codes Using a Reconfigurable Optical Model. [Citation Graph (0, 0)][DBLP]
    SNPD, 2005, pp:288-293 [Conf]
  18. Liang Cheng, Anu G. Bourgeois, Bo-Hyun Yu
    Power Management in Wireless Ad Hoc Networks Using AODV. [Citation Graph (0, 0)][DBLP]
    SNPD, 2005, pp:436-443 [Conf]
  19. Sharareh Babvey, Anu G. Bourgeois, José Alberto Fernández-Zepeda, Steven W. McLaughlin
    Scalable and Efficient Implementations of the Ldpc Decoder Using Reconfigurable Models. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2006, v:17, n:2, pp:303-322 [Journal]
  20. Anu G. Bourgeois, Jerry L. Trahan
    Relating Two-Dimensional Reconfigurable Meshes with Optically Pipelined Buses. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2000, v:11, n:4, pp:553-571 [Journal]
  21. José Alberto Fernández-Zepeda, Alejandro Estrella-Balderrama, Anu G. Bourgeois
    Designing Fault Tolerant Algorithms For Reconfigurable Meshes. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2005, v:16, n:1, pp:71-88 [Journal]
  22. José Alberto Fernández-Zepeda, Daniel Fajardo-Delgado, José Antonio Cárdenas-Haro, Anu G. Bourgeois
    Efficient Simulation Of An Acyclic Directed Reconfigurable Model On An Undirected Reconfigurable Model. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2005, v:16, n:1, pp:55-70 [Journal]
  23. Anu G. Bourgeois, Yi Pan, Sushil K. Prasad
    Constant time fault tolerant algorithms for a linear array with a reconfigurable pipelined bus system. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:3, pp:374-381 [Journal]
  24. Jerry L. Trahan, Anu G. Bourgeois, Yi Pan, Ramachandran Vaidyanathan
    Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2000, v:60, n:9, pp:1125-1136 [Journal]
  25. Anu G. Bourgeois, Jerry L. Trahan
    Fault tolerant algorithms for a linear array with a reconfigurable pipelined bus system. [Citation Graph (0, 0)][DBLP]
    Parallel Algorithms Appl., 2003, v:18, n:3, pp:139-153 [Journal]
  26. Jerry L. Trahan, Anu G. Bourgeois, Ramachandran Vaidyanathan
    Tighter and Broader Complexity Results for Reconfigurable Models. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 1998, v:8, n:3, pp:271-282 [Journal]
  27. Carlos Alberto Cordova-Flores, José Alberto Fernández-Zepeda, Anu G. Bourgeois
    Constant Time Simulation of an R-Mesh on an LR-Mesh. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]
  28. Eunjung Cho, Anu G. Bourgeois, Feng Tan
    An FPGA Design to Achieve Fast and Accurate Results for Molecular Dynamics Simulations. [Citation Graph (0, 0)][DBLP]
    ISPA, 2007, pp:256-267 [Conf]

  29. 3D Block-Based Medial Axis Transform and Chessboard Distance Transform on the CREW PRAM. [Citation Graph (, )][DBLP]


  30. Examining the Feasibility of Reconfigurable Models for Molecular Dynamics Simulation. [Citation Graph (, )][DBLP]


  31. Efficient and accurate FPGA-based simulator for Molecular Dynamics. [Citation Graph (, )][DBLP]


  32. IEEE 802.15.4 Simulation Module in Network Simulator GTNetS. [Citation Graph (, )][DBLP]


  33. A Performance Comparison Study of GTS Allocation Schemes in IEEE 802.15.4. [Citation Graph (, )][DBLP]


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