SCEAS

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Izzet Kale: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

Artur Krukowski, Izzet Kale
Virtual Classroom. [Citation Graph (0, 0)][DBLP]
ICALT, 2001, pp:279-282 [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
Performance of an adaptive homodyne receiver in the presence of multipath, Rayleigh-fading and time-varying quadrature errors. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2003, pp:69-72 [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
On various low-hardware-complexity LMS algorithms for adaptive I/Q correction in quadrature receivers. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2004, pp:461-464 [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
Joint compensation of IQ-imbalance and carrier phase synchronization errors in communication receivers. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2005, pp:4481-4484 [Conf]
Süleyman Sirri Demirsoy, Robert Beck, Andrew G. Dempster, Izzet Kale
Reconfigurable implementation of recursive DCT kernels for reduced quantization noise. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2003, pp:289-292 [Conf]
Süleyman Sirri Demirsoy, Andrew G. Dempster, Izzet Kale
Design guidelines for reconfigurable multiplier blocks. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2003, pp:293-296 [Conf]
Süleyman Sirri Demirsoy, Izzet Kale, Andrew G. Dempster
Synthesis of reconfigurable multiplier blocks: part I - fundamentals. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 2005, pp:536-539 [Conf]
Süleyman Sirri Demirsoy, Izzet Kale, Andrew G. Dempster
Synthesis of reconfigurable multiplier blocks: part - II algorithm. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 2005, pp:540-543 [Conf]
Yasutaka Haga, Hashem Zare-Hoseini, Laurence Berkovi, Izzet Kale
Design of a 0.8 Volt fully differential CMOS OTA using the bulk-driven technique. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 2005, pp:220-223 [Conf]
Artur Krukowski, Izzet Kale, Richard C. S. Morling, K. Hejn
A Design Technique for Polyphase Decimators with Binary Constrained Coefficients for High Resolution A/D Converters. [Citation Graph (0, 0)][DBLP]
ISCAS, 1994, pp:533-536 [Conf]
Artur Krukowski, Izzet Kale
Polyphase IIR filter banks for subband adaptive echo cancellation applications. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2003, pp:405-408 [Conf]
Artur Krukowski, Izzet Kale
Design of complex polyphase IIR multi-flattop filters. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2004, pp:533-536 [Conf]
R. LeReverend, Izzet Kale, D. Guy, D. Morling, S. Morris
An ultra-low power double-sampled A/D MASH /spl Sigma//spl Delta/ modulator. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 2003, pp:1001-1004 [Conf]
Richard C. S. Morling, Izzet Kale, S. J. Morris, F. Custode
DSP engine for ultra-low-power audio applications. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2003, pp:357-360 [Conf]
Izzet Ozcelik, Izzet Kale, Buyurman Baykal
Blind MLSE based on the matched filter estimation using the CMA. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2004, pp:605-608 [Conf]
Izzet Ozcelik, Izzet Kale, Buyurman Baykal
Decision feedback equalizer with the blind matched filter estimation. [Citation Graph (0, 0)][DBLP]
ISCAS (6), 2005, pp:5746-5749 [Conf]
Hashem Zare-Hoseini, Izzet Kale
On the effects of finite and nonlinear DC-gain of the amplifiers in switched-capacitor Delta-Sigma modulators. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2005, pp:2547-2550 [Conf]
Hashem Zare-Hoseini, Omid Shoaei, Izzet Kale
A new multiply-by-two gain-stage with enhanced immunity to capacitor-mismatch. [Citation Graph (0, 0)][DBLP]
ISCAS (2), 2005, pp:1409-1412 [Conf]
Artur Krukowski, Izzet Kale
Constraint two-path polyphase IIR filter design using downhill simplex algorithm. [Citation Graph (0, 0)][DBLP]
ISCAS (2), 2001, pp:749-752 [Conf]
Artur Krukowski, Izzet Kale
The design of arbitrary-band multi-path polyphase IIR filters. [Citation Graph (0, 0)][DBLP]
ISCAS (2), 2001, pp:741-744 [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
Adaptive compensation of analog front-end I/Q mismatches in digital receivers. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2001, pp:370-373 [Conf]
David J. Willingham, Izzet Kale
Asynchronous, quasi-Adiabatic (Asynchrobatic) logic for low-power very wide data width applications. [Citation Graph (0, 0)][DBLP]
ISCAS (2), 2004, pp:257-260 [Conf]
Süleyman Sirri Demirsoy, Andrew G. Dempster, Izzet Kale
Power analysis of multiplier blocks. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 2002, pp:297-300 [Conf]
M. Rezki, L. Sabel, Izzet Kale
A prefiltering approach to frequency offset estimation in AWGN. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2002, pp:480-483 [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
Correction of transmitter gain and phase errors at the receiver. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2002, pp:109-112 [Conf]
Richard C. S. Morling, Izzet Kale
Dynamic range of allpass filter structures. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2002, pp:433-436 [Conf]
T. Bourdi, A. Borjak, Izzet Kale
Agile multi-band delta-sigma frequency synthesizer architecture. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2002, pp:413-416 [Conf]
Andrew G. Dempster, Süleyman Sirri Demirsoy, Izzet Kale
Designing multiplier blocks with low logic depth. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2002, pp:773-776 [Conf]
Ediz Çetin, Süleyman Sirri Demirsoy, Izzet Kale, Richard C. S. Morling
A Low-Complexity Self-Calibrating Adaptive Quadrature Receiver. [Citation Graph (0, 0)][DBLP]
AHS, 2006, pp:428-435 [Conf]
Robert Beck, Andrew G. Dempster, Izzet Kale
Characterisation of finite-precision resonators used in recursive filter DFT implementations. [Citation Graph (0, 0)][DBLP]
Signal Processing, 2000, v:80, n:1, pp:161-183 [Journal]
Jaswinder Lota, Mohammed Al-Janabi, Izzet Kale
Tonality Index of Sigma-Delta Modulators : A Psychoacoustics Model Based Approach. [Citation Graph (0, 0)][DBLP]
ISCAS, 2007, pp:729-732 [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
Living and Dealing with RF Impairments in Communication Transceivers. [Citation Graph (0, 0)][DBLP]
ISCAS, 2007, pp:21-24 [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
Analysis and Compensation of RF Impairments for Next Generation Multimode GNSS Receivers. [Citation Graph (0, 0)][DBLP]
ISCAS, 2007, pp:1729-1732 [Conf]
Jaswinder Lota, Mohammed Al-Janabi, Izzet Kale
Stability analysis of higher-order delta-sigma modulators using the describing function method. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
Yasutaka Haga, Richard C. S. Morling, Izzet Kale
A new bulk-driven input stage design for sub 1-volt CMOS op-amps. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
T. Bourdi, A. Borjak, Izzet Kale
A modeling platform for efficient characterization of phase-locked loop Delta Sigma frequency synthesizers. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
Ediz Çetin, Izzet Kale, Richard C. S. Morling
Efficient low-power design and implementation of IQ-imbalance compensator using early termination. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
R. Kazazoglu, Süleyman Sirri Demirsoy, Izzet Kale, Richard C. S. Morling
A computationally efficient DAB bit-stream processor. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
Hashem Zare-Hoseini, Izzet Kale
Continuous time delta sigma modulators with reduced clock jitter sensitivity. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
Hashem Zare-Hoseini, Omid Shoaei, Izzet Kale
A new structure for capacitor-mismatch-insensitive multiply-by-two amplification. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
Design and low-power implementation of an adaptive image rejection receiver. [Citation Graph (, )][DBLP]

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