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Konrad Malkowski: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sayaka Akioka, Konrad Malkowski, Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris
    Characterizing the Performance and Energy Attributes of Scientific Simulations. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2006, pp:242-249 [Conf]
  2. Konrad Malkowski, Padma Raghavan
    Multi-pass Mapping Schemes for Parallel Sparse Matrix Computations. [Citation Graph (0, 0)][DBLP]
    International Conference on Computational Science (1), 2005, pp:245-255 [Conf]
  3. Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir, Padma Raghavan
    Reducing Power with Performance Constraints for Parallel Sparse Applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  4. Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
    On improving performance and energy profiles of sparse scientific applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  5. Seung Woo Son, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan
    Integrated link/CPU voltage scaling for reducing energy consumption of parallel sparse matrix applications. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  6. Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
    Conjugate gradient sparse solvers: performance-power characteristics. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  7. Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
    Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations. [Citation Graph (0, 0)][DBLP]
    SC, 2006, pp:146- [Conf]
  8. Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
    Memory Optimizations For Fast Power-Aware Sparse Computations. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-6 [Conf]
  9. Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin
    Load Miss Prediction - Exploiting Power Performance Trade-offs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]
  10. Seung Woo Son, Konrad Malkowski, Guilin Chen, Mahmut T. Kandemir, Padma Raghavan
    Reducing energy consumption of parallel sparse matrix applications through integrated link/CPU voltage scaling. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2007, v:41, n:3, pp:179-213 [Journal]

  11. Ring data location prediction scheme for Non-Uniform Cache Architectures. [Citation Graph (, )][DBLP]


  12. Managing power, performance and reliability trade-offs. [Citation Graph (, )][DBLP]


  13. Towards energy efficient scaling of scientific codes. [Citation Graph (, )][DBLP]


  14. Phase-aware adaptive hardware selection for power-efficient scientific computations. [Citation Graph (, )][DBLP]


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