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Jarrod A. Roy: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Saurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov
    Unification of partitioning, placement and floorplanning. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:550-557 [Conf]
  2. Jarrod A. Roy, James F. Lu, Igor L. Markov
    Seeing the forest and the trees: Steiner wirelength optimization in placemen. [Citation Graph (0, 0)][DBLP]
    ISPD, 2006, pp:78-85 [Conf]
  3. Jarrod A. Roy, David A. Papa, Saurabh N. Adya, Hayward H. Chan, Aaron N. Ng, James F. Lu, Igor L. Markov
    Capo: robust and scalable open-source min-cut floorplacer. [Citation Graph (0, 0)][DBLP]
    ISPD, 2005, pp:224-226 [Conf]
  4. Jarrod A. Roy, David A. Papa, Aaron N. Ng, Igor L. Markov
    Satisfying whitespace requirements in top-down placement. [Citation Graph (0, 0)][DBLP]
    ISPD, 2006, pp:206-208 [Conf]
  5. DoRon B. Motter, Jarrod A. Roy, Igor L. Markov
    Resolution cannot polynomially simulate compressed-BFS. [Citation Graph (0, 0)][DBLP]
    Ann. Math. Artif. Intell., 2005, v:44, n:1-2, pp:121-156 [Journal]
  6. Jarrod A. Roy, Saurabh N. Adya, David A. Papa, Igor L. Markov
    Min-cut floorplacement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:7, pp:1313-1326 [Journal]

  7. ECO-system: Embracing the Change in Placement. [Citation Graph (, )][DBLP]


  8. Protecting bus-based hardware IP by secret sharing. [Citation Graph (, )][DBLP]


  9. EPIC: Ending Piracy of Integrated Circuits. [Citation Graph (, )][DBLP]


  10. High-performance routing at the nanometer scale. [Citation Graph (, )][DBLP]


  11. CRISP: Congestion reduction by iterated spreading during placement. [Citation Graph (, )][DBLP]


  12. The coming of age of (academic) global routing. [Citation Graph (, )][DBLP]


  13. What makes a design difficult to route. [Citation Graph (, )][DBLP]


  14. ITOP: integrating timing optimization within placement. [Citation Graph (, )][DBLP]


  15. Completing high-quality global routes. [Citation Graph (, )][DBLP]


  16. Sidewinder: a scalable ILP-based router. [Citation Graph (, )][DBLP]


  17. Circuit CAD Tools as a Security Threat. [Citation Graph (, )][DBLP]


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