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Moayad Fahim Ali: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Moayad Fahim Ali, Sean Safarpour, Andreas G. Veneris, Magdy S. Abadir, Rolf Drechsler
    Post-verification debugging of hierarchical designs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:871-876 [Conf]
  2. Moayad Fahim Ali, Andreas G. Veneris, Alexander Smith, Sean Safarpour, Rolf Drechsler, Magdy S. Abadir
    Debugging sequential circuits using Boolean satisfiability. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:204-209 [Conf]
  3. Moayad Fahim Ali, Sean Safarpour, Andreas G. Veneris, Magdy S. Abadir, Rolf Drechsler
    Post-Verification Debugging of Hierarchical Designs. [Citation Graph (0, 0)][DBLP]
    MTV, 2005, pp:42-47 [Conf]
  4. Moayad Fahim Ali, Andreas G. Veneris, Sean Safarpour, Magdy S. Abadir, Freescale Semiconductor, Rolf Drechsler, Alexander Smith
    Debugging Sequential Circuits Using Boolean Satisfiability. [Citation Graph (0, 0)][DBLP]
    MTV, 2004, pp:44-49 [Conf]
  5. Alexander Smith, Andreas G. Veneris, Moayad Fahim Ali, Anastasios Viglas
    Fault diagnosis and logic debugging using Boolean satisfiability. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:10, pp:1606-1621 [Journal]

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