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Publications of Author

1. David G. Chinnery, B. Nikolic, Kurt Keutzer
   Achieving 550Mhz in an ASIC Methodology. [Citation Graph (0, 0)][DBLP]
   DAC, 2001, pp:420-425 [Conf]
   
2. Julio Leao da Silva Jr., J. Shamberger, M. Josie Ammer, C. Guo, Suet-Fei Li, Rahul C. Shah, Tim Tuan, Michael Sheets, Jan M. Rabaey, B. Nikolic, Alberto L. Sangiovanni-Vincentelli, Paul K. Wright
   Design methodology for PicoRadio networks. [Citation Graph (0, 0)][DBLP]
   DATE, 2001, pp:314-325 [Conf]
   
3. Robert W. Brodersen, Mark Horowitz, Dejan Markovic, Borivoje Nikolic, Vladimir Stojanovic
   Methods for true power minimization. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2002, pp:35-42 [Conf]
   
4. Stephanie Augsburger, Borivoje Nikolic
   Combining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction. [Citation Graph (0, 0)][DBLP]
   ICCD, 2002, pp:316-321 [Conf]
   
5. Sokratis D. Vamvakos, Carl Werner, Borivoje Nikolic
   Phase-locked loop architecture for adaptive jitter optimization. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2004, pp:161-164 [Conf]
   
6. Zheng Guo, Sriram Balasubramanian, Radu Zlatanovici, Tsu-Jae King, Borivoje Nikolic
   FinFET-based SRAM design. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2005, pp:2-7 [Conf]
   
7. Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
   Level conversion for dual-supply systems. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2003, pp:164-167 [Conf]
   
8. Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current
   Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results. [Citation Graph (0, 0)][DBLP]
   ISLPED, 1997, pp:323-327 [Conf]
   
9. Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen
   Analysis and design of low-energy flip-flops. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2001, pp:52-55 [Conf]
   
10. Radu Zlatanovici, Borivoje Nikolic
    Power - Performance Optimization for Custom Digital Circuits. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:404-414 [Conf]
    
11. Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic
    Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:148-0 [Conf]
    
12. Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
    Level conversion for dual-supply systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:2, pp:185-195 [Journal]
    
13. Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright
    Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation. [Citation Graph (0, 0)][DBLP]
    GLOBECOM, 2006, pp:- [Conf]
    
14. Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current
    Clocked CMOS adiabatic logic with integrated single-phase power-clock supply. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:4, pp:460-463 [Journal]
    
15. Radu Zlatanovici, Borivoje Nikolic
    Power - Performance Optimization for Custom Digital Circuits. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:1, pp:113-120 [Journal]
    
16. 
    Fresh air: the emerging landscape of design for networked embedded systems. [Citation Graph (, )][DBLP]
    
    
17. 
    Quantization Effects in Low-Density Parity-Check Decoders. [Citation Graph (, )][DBLP]
    
    
18. 
    Analysis of Absorbing Sets for Array-Based LDPC Codes. [Citation Graph (, )][DBLP]
    
    
19. 
    Lowering LDPC Error Floors by Postprocessing. [Citation Graph (, )][DBLP]
    
    
20. 
    Peak-to-Average Power Ratio Reduction in an FDM Broadcast System. [Citation Graph (, )][DBLP]
    
    
21. 
    Cooperative Multiplexing in the Multiple Antenna Half Duplex Relay Channel [Citation Graph (, )][DBLP]