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Publications of Author

1. Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
   Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming. [Citation Graph (0, 0)][DBLP]
   DAC, 2006, pp:669-674 [Conf]
   
2. Paulo F. Flores, José C. Monteiro, Eduardo A. C. da Costa
   An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2005, pp:13-16 [Conf]
   
3. Eduardo A. C. da Costa, Sergio Bampi, José Monteiro
   A New Architecture for Signed Radix-2m Pure Array Multipliers. [Citation Graph (0, 0)][DBLP]
   ICCD, 2002, pp:112-117 [Conf]
   
4. Vagner S. Rosa, Eduardo A. C. da Costa, Sergio Bampi
   A High Performance Parallel FIR Filters Generation Tool. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 2006, pp:216-222 [Conf]
   
5. Vagner S. Rosa, Eduardo A. C. da Costa, José C. Monteiro, Sergio Bampi
   An improved synthesis method for low power hardwired FIR filters. [Citation Graph (0, 0)][DBLP]
   SBCCI, 2004, pp:237-241 [Conf]
   
6. Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
   Exploiting general coefficient representation for the optimal sharing of partial products in MCMs. [Citation Graph (0, 0)][DBLP]
   SBCCI, 2006, pp:161-166 [Conf]
   
7. M. Fonseca, Eduardo A. C. da Costa, Sergio Bampi, José C. Monteiro
   Design of a radix-2^m hybrid array multiplier using carry save adder format. [Citation Graph (0, 0)][DBLP]
   SBCCI, 2005, pp:172-177 [Conf]
   
8. Eduardo A. C. da Costa, Sergio Bampi, José C. Monteiro
   A New Pipelined Array Architecture for Signed Multiplication. [Citation Graph (0, 0)][DBLP]
   SBCCI, 2003, pp:65-70 [Conf]
   
9. Eduardo A. C. da Costa, José Monteiro, Sergio Bampi
   Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths. [Citation Graph (0, 0)][DBLP]
   VLSI-SOC, 2003, pp:307-0 [Conf]
   
10. Eduardo A. C. da Costa, José C. Monteiro, Sergio Bampi
    A new array architecture for signed multiplication using Gray encoded radix-2^m operands. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:2, pp:118-132 [Journal]
    
11. Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José C. Monteiro
    Optimization of Area in Digital FIR Filters using Gate-Level Metrics. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:420-423 [Conf]
    
12. Vagner S. Rosa, Eduardo Costa, Sergio Bampi
    A VHDL Generation Tool for Optimized Parallel FIR Filters. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:134-139 [Conf]
    
13. Leonardo L. de Oliveira, Cristiano Santos, Daniel Lima Ferrão, Eduardo A. C. da Costa, José C. Monteiro, João Baptista Martins, Sergio Bampi, Ricardo Augusto da Luz Reis
    A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2005, pp:25-39 [Conf]
    
14. 
    High performance motion estimation architecture using efficient adder-compressors. [Citation Graph (, )][DBLP]
    
    
15. 
    Effect of Number Representation on the Achievable Minimum Number of Operations in Multiple Constant Multiplications. [Citation Graph (, )][DBLP]