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Rahul Kundu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rahul Kundu, R. D. (Shawn) Blanton
    ATPG for Noise-Induced Switch Failures in Domino Logic. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:765-769 [Conf]
  2. Rahul Kundu, Ronald D. Blanton
    Identification of crosstalk switch failures in domino CMOS circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 2000, pp:502-509 [Conf]
  3. Rahul Kundu, R. D. (Shawn) Blanton
    Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:122-130 [Conf]
  4. Keerthi Heragu, Manish Sharma, Rahul Kundu, R. D. (Shawn) Blanton
    Testing of Dynamic Logic Circuits Based on Charge Sharing. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:396-403 [Conf]
  5. Rahul Kundu, R. D. (Shawn) Blanton
    Timed Test Generation Crosstalk Switch Failures in Domino CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 2002, pp:379-388 [Conf]
  6. Jingjing Xu, Rahul Kundu, F. Joel Ferguson
    A Systematic DFT Procedure for Library Cells. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:460-466 [Conf]
  7. Keerthi Heragu, Manish Sharma, Rahul Kundu, Ronald D. Blanton
    Test vector generation for charge sharing failures in dynamic logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:12, pp:1502-1508 [Journal]

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