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Mosin Mondal :
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Mosin Mondal , Yehia Massoud Reducing pessimism in RLC delay estimation using an accurate analytical frequency dependent model for inductance. [Citation Graph (0, 0)][DBLP ] ICCAD, 2005, pp:691-696 [Conf ] Mosin Mondal , Tamer Ragheb , Xiang Wu , Adnan Aziz , Yehia Massoud Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations. [Citation Graph (0, 0)][DBLP ] ISQED, 2007, pp:873-878 [Conf ] Mosin Mondal , Andrew J. Ricketts , Sami Kirolos , Tamer Ragheb , Greg M. Link , Narayanan Vijaykrishnan , Yehia Massoud Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers. [Citation Graph (0, 0)][DBLP ] ISQED, 2007, pp:67-72 [Conf ] Mosin Mondal , Kartik Mohanram , Yehia Massoud Parameter-Variation-Aware Analysis for Noise Robustness. [Citation Graph (0, 0)][DBLP ] ISQED, 2007, pp:655-659 [Conf ] Mosin Mondal , Andrew J. Ricketts , Sami Kirolos , Tamer Ragheb , Greg M. Link , Narayanan Vijaykrishnan , Yehia Massoud Thermally robust clocking schemes for 3D integrated circuits. [Citation Graph (0, 0)][DBLP ] DATE, 2007, pp:1206-1211 [Conf ] Mosin Mondal , Sami Kirolos , Yehia Massoud Estimation of Capacitive Crosstalk-Induced Short-Circuit Energy. [Citation Graph (0, 0)][DBLP ] ISCAS, 2007, pp:897-900 [Conf ] Mosin Mondal , Yehia Massoud Accurate Loop Self Inductance Bound for Efficient Inductance Screening. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2006, v:14, n:12, pp:1393-1397 [Journal ] Predicting the Performance and Reliability of Carbon Nanotube Bundles for On-Chip Interconnect. [Citation Graph (, )][DBLP ] Efficient hierarchical discretization of off-chip power delivery network geometries for 2.5D electrical analysis. [Citation Graph (, )][DBLP ] Search in 0.001secs, Finished in 0.002secs