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Koichiro Ishibashi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yasumasa Tsukamoto, Koji Nii, Susumu Imaoka, Yuji Oda, Shigeki Ohbayashi, Tomoaki Yoshizawa, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara
    Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2005, pp:398-405 [Conf]
  2. Masayuki Miyazaki, Hiroyuki Mizuno, Koichiro Ishibashi
    A delay distribution squeezing scheme with speed-adaptive threshold-voltage CMOS (SA-Vt CMOS) for low voltage LSIs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1998, pp:48-53 [Conf]
  3. Takahiro Yamashita, Tetsuya Fujimoto, Koichiro Ishibashi
    Power Valve: for low power operation and low stand-by power. [Citation Graph (0, 0)][DBLP]
    IEICE Electronic Express, 2005, v:2, n:3, pp:64-69 [Journal]
  4. Keisuke Toyama, Satoshi Misaka, Kazuo Aisaka, Toshiyuki Aritsuka, Kunio Uchiyama, Koichiro Ishibashi, Hiroshi Kawaguchi, Takayasu Sakurai
    Frequency-voltage cooperative CPU power control: A design rule and its application by feedback prediction. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 2005, v:36, n:6, pp:39-48 [Journal]

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