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Publications of Author

1. Xiaoji Ye, Peng Li, Frank Liu
   Practical variation-aware interconnect delay and slew analysis for statistical timing verification. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2006, pp:54-59 [Conf]
   
2. Xiaoji Ye, Yaping Zhan, Peng Li
   Statistical Leakage Power Minimization Using Fast Equi-Slack Shell Based Optimization. [Citation Graph (0, 0)][DBLP]
   DAC, 2007, pp:853-858 [Conf]
   
3. Xiaoji Ye, Frank Liu, Peng Li
   Fast Variational Interconnect Delay and Slew Computation Using Quadratic Models. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2007, v:15, n:8, pp:913-926 [Journal]
   
4. 
   WavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines. [Citation Graph (, )][DBLP]
   
   
5. 
   Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation. [Citation Graph (, )][DBLP]
   
   
6. 
   Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation. [Citation Graph (, )][DBLP]
   
   
7. 
   Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding. [Citation Graph (, )][DBLP]
   
   
8. 
   MAPS: multi-algorithm parallel circuit simulation. [Citation Graph (, )][DBLP]
   
   
9. 
   Leveraging efficient parallel pattern search for clock mesh optimization. [Citation Graph (, )][DBLP]
   
   
10. 
    Accurate clock mesh sizing via sequential quadraticprogramming. [Citation Graph (, )][DBLP]
    
    
11. 
    Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding. [Citation Graph (, )][DBLP]
    
    
12. 
    An application-specific adjoint sensitivity analysis framework for clock mesh sensitivity computation. [Citation Graph (, )][DBLP]