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Robert C. Chang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Eric Y. Chou, Bing J. Sheu, Tony H. Wu, Robert C. Chang
    VLSI design of densely-connected array processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:492-497 [Conf]
  2. Chin-Sheng Chen, Robert C. Chang
    A new prescaler for fully integrated 5-GHz CMOS frequency synthesizer. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2004, pp:245-248 [Conf]
  3. Hsin-Lei Lin, Robert C. Chang, Chih-Hao Huang, Hongchin Lin
    A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:153-156 [Conf]
  4. Bing J. Sheu, Robert C. Chang, Tony H. Wu, Sa H. Bang
    VLSI-Compatible Cellular Neural Networks with Optimal Solution Capability for Optimization. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1165-1168 [Conf]
  5. Robert C. Chang, Lung-Chih Kuo, Chih-Yuan Hsieh
    VLSI implementation of a multicast ATM switch. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:129-132 [Conf]
  6. Yu-Yin Sung, Robert C. Chang
    A novel CMOS double-edge triggered flip-flop for low-power applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:665-668 [Conf]
  7. Robert C. Chang, L.-C. Hsu, M.-C. Sun
    A Low-Power and High-Speed D Flip-Flop Using a Single Latch. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2002, v:11, n:1, pp:51-56 [Journal]
  8. Robert C. Chang, Lung-Chih Kuo, Hou-Ming Chen
    A Low-voltage Low-power Cmos Phase-locked Loop. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2005, v:14, n:5, pp:997-1006 [Journal]
  9. Hou-Ming Chen, Chih-Liang Huang, Robert C. Chang
    A new temperature-compensated CMOS bandgap reference circuit for portable applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  10. Kuang-Hao Lin, Hsin-Lei Lin, Shih-Ming Wang, Robert C. Chang
    Implementation of digital IQ imbalance compensation in OFDM WLAN receivers. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  11. Hardware Architecture of Improved Tomlinson-Harashima Precoding for Downlink MC-CDMA. [Citation Graph (, )][DBLP]


  12. A Monolithic Boost Converter with an Adaptable Current-Limited PFM Scheme. [Citation Graph (, )][DBLP]


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