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Thomas Rinderknecht: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Liyang Lai, Janak H. Patel, Thomas Rinderknecht, Wu-Tung Cheng
    Hardware Ef.cient LBISTWith Complementary Weights. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:479-484 [Conf]
  2. Liyang Lai, Janak H. Patel, Thomas Rinderknecht, Wu-Tung Cheng
    Logic BIST with Scan Chain Segmentation. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:57-66 [Conf]
  3. Janusz Rajski, Nilanjan Mukherjee, Jerzy Tyszer, Thomas Rinderknecht
    Embedded Test for Low Cost Manufacturing. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:21-23 [Conf]
  4. Liyang Lai, Thomas Rinderknecht, Wu-Tung Cheng, Janak H. Patel
    Logic BIST Using Constrained Scan Cells. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:199-205 [Conf]
  5. Xijiang Lin, Ron Press, Janusz Rajski, Paul Reuter, Thomas Rinderknecht, Bruce Swanson, Nagesh Tamarapalli
    High-Frequency, At-Speed Scan Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:5, pp:17-25 [Journal]

  6. ATPG Heuristics Dependant Observation Point Insertion for Enhanced Compaction and Data Volume Reduction. [Citation Graph (, )][DBLP]


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