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Farnaz Mounes-Toussi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Farnaz Mounes-Toussi, David J. Lilja
    Write buffer design for cache-coherent shared-memory multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:506-511 [Conf]
  2. J. V. Tran, Farnaz Mounes-Toussi, S. N. Storino, D. L. Stasiak
    SOI Implementation of a 64-Bit Adder. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:573-0 [Conf]
  3. Farnaz Mounes-Toussi, David J. Lilja
    The Effect of using State-Based Priority Information in a Shared-Memory Multiprocessor Cache Replacement Policy. [Citation Graph (0, 0)][DBLP]
    ICPP, 1998, pp:217-224 [Conf]
  4. Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li
    An evaluation of a compiler optimization for improving the performance of a coherence directory. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1994, pp:75-84 [Conf]
  5. Trung N. Nguyen, Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li
    A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement. [Citation Graph (0, 0)][DBLP]
    IFIP PACT, 1994, pp:69-78 [Conf]
  6. Farnaz Mounes-Toussi, David J. Lilja
    The Potential of Compile-Time Analysis to Adapt the Cache Coherence Enforcement Strategy to the Data Sharing Characteristics. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:5, pp:470-481 [Journal]

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