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P. P. Chakrabarti: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Admissibility of A0* when Heuristics Overestimate. [Citation Graph (1, 0)][DBLP]
    Artif. Intell., 1987, v:34, n:1, pp:97-113 [Journal]
  2. P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Best first search in and/or graphs. [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1988, pp:256-261 [Conf]
  3. Pallab Dasgupta, Arindam Chakrabarti, P. P. Chakrabarti
    Open Computation Tree Logic for Formal Verification of Modules. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2002, pp:735-740 [Conf]
  4. Sandip Aine, Rajeev Kumar, P. P. Chakrabarti
    An Adaptive Framework for Solving Multiple Hard Problems Under Time Constraints. [Citation Graph (0, 0)][DBLP]
    CIS (1), 2005, pp:57-64 [Conf]
  5. Arindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee
    Formal verification of module interfaces against real time specifications. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:141-145 [Conf]
  6. Prasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
    Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent? [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:668-669 [Conf]
  7. Sayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti
    What lies between design intent coverage and model checking? [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1217-1222 [Conf]
  8. Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P. Chakrabarti
    Synthesis of system verilog assertions. [Citation Graph (0, 0)][DBLP]
    DATE Designers' Forum, 2006, pp:70-75 [Conf]
  9. Pallab Dasgupta, P. P. Chakrabarti, Amit Nandi, Sekar Krishna, Arindam Chakrabarti
    Abstraction of word-level linear arithmetic functions from bit-level component descriptions. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:4-8 [Conf]
  10. Arijit Mondal, P. P. Chakrabarti, Chittaranjan A. Mandal
    A New Approach to Timing Analysis Using Event Propagation and Temporal Logic. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1198-1203 [Conf]
  11. Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
    Multiobjective EA Approach for Improved Quality of Solutions for Spanning Tree Problem. [Citation Graph (0, 0)][DBLP]
    EMO, 2005, pp:811-825 [Conf]
  12. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    A Near Optimal Algorithm for the Extended Cow-Path Problem in the Presence of Relative Errors. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1995, pp:22-36 [Conf]
  13. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    A New Competitive Algorithm for Agent Searching in Unknown Streets. [Citation Graph (0, 0)][DBLP]
    FSTTCS, 1996, pp:147-155 [Conf]
  14. Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
    Improved Quality of Solutions for Multiobjective Spanning Tree Problem Using Distributed Evolutionary Algorithm. [Citation Graph (0, 0)][DBLP]
    HiPC, 2004, pp:494-503 [Conf]
  15. Sayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
    Formal verification coverage: computing the coverage gap between temporal specifications. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:198-203 [Conf]
  16. Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
    Multiobjective Genetic Search for Spanning Tree Problem. [Citation Graph (0, 0)][DBLP]
    ICONIP, 2004, pp:218-223 [Conf]
  17. Sandip Aine, Rajeev Kumar, P. P. Chakrabarti
    Adaptive Control of Anytime Algorithm Parameters. [Citation Graph (0, 0)][DBLP]
    IICAI, 2005, pp:72-87 [Conf]
  18. Sandip Aine, P. P. Chakrabarti, Rajeev Kumar
    AWA* - A Window Constrained Anytime Heuristic Search Algorithm. [Citation Graph (0, 0)][DBLP]
    IJCAI, 2007, pp:2250-2255 [Conf]
  19. S. Sriram, R. Tandon, Pallab Dasgupta, P. P. Chakrabarti
    Symbolic verification of Boolean constraints over partially specified functions. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:113-116 [Conf]
  20. Jatindra Kumar Deka, S. Chaki, Pallab Dasgupta, P. P. Chakrabarti
    Abstractions for model checking of event timings. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:125-128 [Conf]
  21. B. Rajendran, V. Kheterpal, A. Das, J. Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti
    Timing analysis of tree-like RLC circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:838-841 [Conf]
  22. Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti
    Complexity of Compositional Model Checking of Computation Tree Logic on Simple Structures. [Citation Graph (0, 0)][DBLP]
    IWDC, 2004, pp:102-113 [Conf]
  23. Rajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti
    Distributed Evolutionary Algorithm Search for Multiobjective Spanning Tree Problem. [Citation Graph (0, 0)][DBLP]
    IWDC, 2004, pp:538- [Conf]
  24. U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Pruning by Upperbounds in Heuristic Search: Use of Approximate Algorithms. [Citation Graph (0, 0)][DBLP]
    KBCS, 1989, pp:451-461 [Conf]
  25. Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
    The BUSpec platform for automated generation of verification aids for standard bus protocols. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2004, pp:119-128 [Conf]
  26. Diganchal Chakraborty, P. P. Chakrabarti, Arijit Mondal, Pallab Dasgupta
    A Framework for Estimating Peak Power in Gate-Level Circuits. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2006, pp:573-582 [Conf]
  27. Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
    Formal Verification of Modules under Real Time Environment Constraints. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:103-108 [Conf]
  28. Sandip Aine, P. P. Chakrabarti, Rajeev Kumar
    Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:683-688 [Conf]
  29. Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti
    Syntactic Transformation of Assume-Guarantee Assertions: From Sub-Modules to Modules. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:213-218 [Conf]
  30. Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan
    Property Refinement Techniques for Enhancing Coverage of Formal Property Verification. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:109-114 [Conf]
  31. Pankaj Chauhan, Pallab Dasgupta, P. P. Chakrabarti
    Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:324-0 [Conf]
  32. Jatindra Kumar Deka, Pallab Dasgupta, P. P. Chakrabarti
    An Efficiently Checkable Subset of TCTL for Formal Verification of Transition Systems with Delays. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:294-299 [Conf]
  33. Pallab Dasgupta, Prasenjit Mitra, P. P. Chakrabarti, S. C. De Sarkar
    Multiobjective Search in VLSI Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:395-400 [Conf]
  34. Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
    Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:201-206 [Conf]
  35. Samik Das, P. P. Chakrabarti, Pallab Dasgupta
    Instruction-Set-Extension Exploration Using Decomposable Heuristic Search. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:293-298 [Conf]
  36. Dipankar Das, Rajeev Kumar, P. P. Chakrabarti
    Dictionary Based Code Compression for Variable Length Instruction Encodings. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:545-550 [Conf]
  37. Tathagato Rai Dastidar, P. P. Chakrabarti
    A Verification System for Transient Response of Analog Circuits Using Model Checking. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:195-200 [Conf]
  38. Pallab Dasgupta, Arindam Chakrabarti, P. P. Chakrabarti
    Open Computation Tree Logic for Formal Verification of Modules. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2002, pp:735-740 [Conf]
  39. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:122-125 [Conf]
  40. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    Design Space Exploration for Data Path Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:166-173 [Conf]
  41. Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar
    Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2006, pp:677-682 [Conf]
  42. Abhishek Somani, P. P. Chakrabarti, Amit Patra
    A Hierarchical Cost Tree Mutation Approach to Optimization of Analog Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2005, pp:535-538 [Conf]
  43. Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti
    A New Pseudo-Boolean Satisfiability based approach to Power Mode Schedulability Analysis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:95-102 [Conf]
  44. Pravanjan Choudhury, P. P. Chakrabarti, Rajeev Kumar
    Online Dynamic Voltage Scaling using Task Graph Mapping Analysis for Multiprocessors. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:89-94 [Conf]
  45. Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta
    Bounded Delay Timing Analysis Using Boolean Satisfiability. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:295-302 [Conf]
  46. S. K. Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar
    Simulation Based Verification using Temporally Attributed Boolean Logic. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:57-62 [Conf]
  47. Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta
    Timing Analysis of Sequential Circuits Using Symbolic Event Propagation. [Citation Graph (0, 0)][DBLP]
    ICCTA, 2007, pp:151-157 [Conf]
  48. P. P. Chakrabarti
    Algorithms for Searching Explicit AND/OR Graphs and their Applications to Problem Reduction Search. [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 1994, v:65, n:2, pp:329-345 [Journal]
  49. P. P. Chakrabarti, Sujoy Ghose, Arup Acharya, S. C. De Sarkar
    Heuristic Search in Restricted Memory. [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 1989, v:41, n:2, pp:197-221 [Journal]
  50. P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Heuristic Search Through Islands. [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 1986, v:29, n:3, pp:339-347 [Journal]
  51. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    Agent Searching in a Tree and the Optimality of Iterative Deepening. [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 1994, v:71, n:1, pp:195-208 [Journal]
  52. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    A Correction to "Agent Searching in a Tree and the Optimality of Iterative Deepening". [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 1995, v:77, n:1, pp:173-176 [Journal]
  53. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    Searching Game Trees under a Partial Order. [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 1996, v:82, n:1-2, pp:237-257 [Journal]
  54. Pallab Dasgupta, P. P. Chakrabarti, Jatindra Kumar Deka, Sriram Sankaranarayanan
    Min-max Computation Tree Logic. [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 2001, v:127, n:1, pp:137-162 [Journal]
  55. U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Reducing Reexpansions in Iterative-Deepening Search by Controlling Cutoff Bounds. [Citation Graph (0, 0)][DBLP]
    Artif. Intell., 1991, v:50, n:2, pp:207-221 [Journal]
  56. P. P. Chakrabarti, Sujoy Ghose, A. Pandey, S. C. De Sarkar
    Increasing Search Efficiency Using Multiple Heuristics. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1989, v:30, n:1, pp:33-36 [Journal]
  57. P. P. Chakrabarti, Sujoy Ghose, A. Pandey, S. C. De Sarkar
    Increasing Search Efficiency Using Multiple Heuristics. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1989, v:32, n:5, pp:275-275 [Journal]
  58. Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti
    The power of first-order quantification over states in branching and linear time temporal logics. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 2004, v:91, n:5, pp:201-210 [Journal]
  59. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    Utility of Pathmax in Partial Order Heuristic Search. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1995, v:55, n:6, pp:317-322 [Journal]
  60. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    Agent Search in Uniform b-Ary Trees: Multiple Goals and Unequal Costs. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1996, v:58, n:6, pp:311-318 [Journal]
  61. Anindya C. Patthak, Indrajit Bhattacharya, Anirban Dasgupta, Pallab Dasgupta, P. P. Chakrabarti
    Quantified Computation Tree Logic. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 2002, v:82, n:3, pp:123-129 [Journal]
  62. U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Multiple Stack Branch and Bound. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1991, v:37, n:1, pp:43-48 [Journal]
  63. U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Effective Use of Memory in Iterative Deepening Search. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1992, v:42, n:1, pp:47-52 [Journal]
  64. U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    A Simple 0.5-Bounded Greedy Algorithm for the 0/1 Knapsack Problem. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1992, v:42, n:3, pp:173-177 [Journal]
  65. P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Generalized best first search using single and multiple heuristics. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1992, v:60, n:1-2, pp:145-175 [Journal]
  66. Partha Pratim Das, P. P. Chakrabarti, Biswanath N. Chatterji
    Generalized distances in digital geometry. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1987, v:42, n:1, pp:51-67 [Journal]
  67. Partha Pratim Das, P. P. Chakrabarti, Biswanath N. Chatterji
    Distance functions in digital geometry. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1987, v:42, n:2, pp:113-136 [Journal]
  68. P. P. Chakrabarti, Sujoy Ghose
    A General Best First Search Algorithm in AND/OR Graphs. [Citation Graph (0, 0)][DBLP]
    J. Algorithms, 1992, v:13, n:2, pp:177-187 [Journal]
  69. Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar
    Multiobjektive Heuristic Search in AND/OR Graphs. [Citation Graph (0, 0)][DBLP]
    J. Algorithms, 1996, v:20, n:2, pp:282-311 [Journal]
  70. U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar
    Improving Greedy Algorithms by Lookahead-Search. [Citation Graph (0, 0)][DBLP]
    J. Algorithms, 1994, v:16, n:1, pp:1-23 [Journal]
  71. Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti
    A Branching Time Temporal Framework for Quantitative Reasoning. [Citation Graph (0, 0)][DBLP]
    J. Autom. Reasoning, 2003, v:30, n:2, pp:205-232 [Journal]
  72. Rajeev Kumar, Amit Gupta, B. S. Pankaj, Mrinmoy Ghosh, P. P. Chakrabarti
    Post-compilation optimization for multiple gains with pattern matching. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 2005, v:40, n:12, pp:14-23 [Journal]
  73. P. P. Chakrabarti
    Partial Precedence Constrained Scheduling. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:10, pp:1127-1130 [Journal]
  74. Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar
    Frame-Based Proportional Round-Robin. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:9, pp:1121-1129 [Journal]
  75. Prasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni
    Design-Intent Coverage - A New Paradigm for Formal Property Verification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:10, pp:1922-1934 [Journal]
  76. Arijit Mondal, P. P. Chakrabarti
    Reasoning about timing behavior of digital circuits using symbolic event propagation and temporal logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:9, pp:1793-1814 [Journal]
  77. Tathagato Rai Dastidar, P. P. Chakrabarti, Partha Ray
    A synthesis system for analog circuits based on evolutionary search and topological reuse. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Evolutionary Computation, 2005, v:9, n:2, pp:211-224 [Journal]
  78. Pallab Dasgupta, P. P. Chakrabarti, Arnab Dey, Sujoy Ghose, Wolfgang Bibel
    Solving Constraint Optimization Problems from CLP-Style Specifications Using Heuristic Search Techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Knowl. Data Eng., 2002, v:14, n:2, pp:353-368 [Journal]
  79. Sudeshna Sarkar, P. P. Chakrabarti, Sujoy Ghose
    A Framework for Learning in Search-Based Systems. [Citation Graph (0, 13)][DBLP]
    IEEE Trans. Knowl. Data Eng., 1998, v:10, n:4, pp:563-575 [Journal]
  80. Arnab Roy, S. K. Panda, Rajeev Kumar, P. P. Chakrabarti
    A framework for systematic validation and debugging of pipeline simulators. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2005, v:10, n:3, pp:462-491 [Journal]
  81. Sudeshna Sarkar, P. P. Chakrabarti, Sujoy Ghose
    Learning while solving problems in best first search. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Systems, Man, and Cybernetics, Part A, 1998, v:28, n:4, pp:535-541 [Journal]
  82. Abhishek Somani, P. P. Chakrabarti, Amit Patra
    A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  83. Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
    Formal methods for checking realizability of coalitions in 3-party systems. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2006, pp:198- [Conf]
  84. Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti
    BUSpec: A framework for generation of verification aids for standard bus protocol specifications. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:3, pp:285-304 [Journal]
  85. Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta
    Event propagation for accurate circuit delay calculation using SAT. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]
  86. Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
    Functional verification of task partitioning for multiprocessor embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  87. Tathagato Rai Dastidar, P. P. Chakrabarti
    A verification system for transient response of analog circuits. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:3, pp:- [Journal]
  88. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    A design space exploration scheme for data-path synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:3, pp:331-338 [Journal]
  89. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    GABIND: a GA approach to allocation and binding for the high-level synthesis of data paths. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:6, pp:747-750 [Journal]

  90. Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. [Citation Graph (, )][DBLP]


  91. Contract Search: Heuristic Search under Node Expansion Constraints. [Citation Graph (, )][DBLP]


  92. Safe-ERfair. [Citation Graph (, )][DBLP]


  93. SystemC Modeling and Validation of A RISC Processor System. [Citation Graph (, )][DBLP]


  94. Adaptive parameter control of evolutionary algorithms to improve quality-time trade-off. [Citation Graph (, )][DBLP]


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