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Se-Hyeon Kang:
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- In-Cheol Park, Sehyeon Kang, Yongseok Yi
Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation. [Citation Graph (0, 0)][DBLP] ICCAD, 2003, pp:138-141 [Conf]
- Myoung-Cheol Shin, Se-Hyeon Kang, In-Cheol Park
An Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking. [Citation Graph (0, 0)][DBLP] ICCD, 2001, pp:511-512 [Conf]
- In-Cheol Park, Se-Hyeon Kang
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation. [Citation Graph (0, 0)][DBLP] ISCAS (6), 2005, pp:5778-5781 [Conf]
- Se-Hyeon Kang, In-Cheol Park
Memory-based low density parity check code decoder architecture using loosely coupled two data-flows. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2004, pp:397-400 [Conf]
- Myoung-Cheol Shin, Seong-Il Park, Sung-Won Lee, Se-Hyeon Kang, In-Cheol Park
Area-efficient digital baseband module for Bluetooth wireless communications. [Citation Graph (0, 0)][DBLP] ISCAS (5), 2002, pp:729-732 [Conf]
- Se-Hyeon Kang, In-Cheol Park
High Speed Sphere Decoding Based on Vertically Incremental Computation. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:665-668 [Conf]
Fast and Area-Efficient Sphere Decoding Using Look-Ahead Search. [Citation Graph (, )][DBLP]
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