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Louise Trevillyan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi
    Production logic synthesis. [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1985, pp:13-16 [Conf]
  2. William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen
    Technology adaption in logic synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1986, pp:94-100 [Conf]
  3. Louise Trevillyan
    An Overview of Logic Synthesis Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1987, pp:166-172 [Conf]
  4. Vijay S. Iyengar, Louise Trevillyan, Pradip Bose
    Representative Traces for Processor Models with Infinite Cache. [Citation Graph (0, 0)][DBLP]
    HPCA, 1996, pp:62-72 [Conf]
  5. Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda
    An Integrated Environment for Technology Closure of Deep-Submicron IC Designs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:1, pp:14-22 [Journal]
  6. Frances E. Allen, J. Lawrence Carter, Janet Fabri, Jeanne Ferrante, William H. Harrison, Paul G. Loewner, Louise Trevillyan
    The Experimental Compiling System. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 1980, v:24, n:6, pp:695-715 [Journal]
  7. John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
    LSS: A system for production logic synthesis. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2000, v:44, n:1, pp:157-166 [Journal]
  8. John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan
    LSS: A System for Production Logic Synthesis. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 1984, v:28, n:5, pp:537-545 [Journal]
  9. John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan
    Logic Synthesis Through Local Transformations. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 1981, v:25, n:4, pp:272-280 [Journal]
  10. Louise Trevillyan, William H. Joyner Jr., C. Leonard Berman
    Global Flow Analysis in Automatic Logic Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:1, pp:77-81 [Journal]
  11. C. Leonard Berman, Louise Trevillyan
    Global flow optimization in automatic logic design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:5, pp:557-564 [Journal]
  12. John A. Darringer, Evan Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich Schanzenbach, Gustavo Tellez, Louise Trevillyan
    EDA in IBM: past, present, and future. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:12, pp:1476-1497 [Journal]
  13. Reinaldo A. Bergamaschi, Salil Raje, Indira Nair, Louise Trevillyan
    Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1997, v:5, n:1, pp:82-100 [Journal]

  14. Logical and physical restructuring of fan-in trees. [Citation Graph (, )][DBLP]


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