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G. Jack Lipovski :
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Stanley Y. W. Su , G. Jack Lipovski CASSM: A Cellular System for Very Large Data Bases. [Citation Graph (34, 3)][DBLP ] VLDB, 1975, pp:456-472 [Conf ] Stanley Y. W. Su , Le Huu Nguyen , Ahmed Emam , G. Jack Lipovski The Architectural Features and Implementation Techniques of the Multicell CASSM. [Citation Graph (8, 0)][DBLP ] IEEE Trans. Computers, 1979, v:28, n:6, pp:430-445 [Journal ] George P. Copeland , G. Jack Lipovski , Stanley Y. W. Su The Architecture of CASSM: A Cellular System for Non-numeric Processing. [Citation Graph (6, 0)][DBLP ] ISCA, 1973, pp:121-128 [Conf ] G. Jack Lipovski Architectural Features of CASSM: A Context Addressed Segment Sequential Memory. [Citation Graph (2, 0)][DBLP ] ISCA, 1978, pp:31-38 [Conf ] Stanley Y. W. Su , George P. Copeland , G. Jack Lipovski Retrieval Operations and Data Representations in a Context-Addressed Disc System. [Citation Graph (2, 0)][DBLP ] SIGIR, 1973, pp:144-160 [Conf ] J. A. Bush , G. Jack Lipovski , Stanley Y. W. Su , J. K. Watson , S. J. Ackerman Some Implementations of Segment Sequential Functions. [Citation Graph (1, 0)][DBLP ] ISCA, 1976, pp:178-185 [Conf ] M. DeMartinis , G. Jack Lipovski , Stanley Y. W. Su , J. K. Watson A Self-Managing Secondary Memory System. [Citation Graph (1, 0)][DBLP ] ISCA, 1976, pp:186-194 [Conf ] Vladimir Cherkassky , Miroslaw Malek , G. Jack Lipovski Fail-Softness Analysis of Tree-Based Local Area Networks. [Citation Graph (0, 0)][DBLP ] ICDCS, 1985, pp:380-385 [Conf ] G. Jack Lipovski , Manuel V. Hermenegildo B-Log: A Branch and Bound Methodology for the Parallel Execution of Logic Programs. [Citation Graph (0, 0)][DBLP ] ICPP, 1985, pp:560-567 [Conf ] Bharat Deep Rathi , Sanjay R. Deshpande , Matthew Sejnowski , Don Walker , Roy M. Jenevein , G. Jack Lipovski , James C. Browne Specification and Implementation of an Integrated Packet Communication Facility for an Array Computer. [Citation Graph (0, 0)][DBLP ] ICPP, 1983, pp:51-58 [Conf ] Judith A. Anderson , G. Jack Lipovski A Virtual Memory for Microprocessors. [Citation Graph (0, 0)][DBLP ] ISCA, 1974, pp:80-84 [Conf ] L. Rodney Goke , G. Jack Lipovski Banyan Networks for Partitioning Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] ISCA, 1973, pp:21-28 [Conf ] L. Rodney Goke , G. Jack Lipovski Banyan Networks for Partitioning Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] 25 Years ISCA: Retrospectives and Reprints, 1998, pp:117-124 [Conf ] R. Jenevien , Doug DeGroot , G. Jack Lipovski A Hardware Support Mechanism for Scheduling Resources in a Parallel Machine Environment. [Citation Graph (0, 0)][DBLP ] ISCA, 1981, pp:57-66 [Conf ] Doug W. Kim , G. Jack Lipovski , Alfred C. Hartmann , Roy M. Jenevein Regular CC-Banyan Networks. [Citation Graph (0, 0)][DBLP ] ISCA, 1988, pp:325-332 [Conf ] G. Jack Lipovski A Varistructured Fail-Soft Cellular Computer. [Citation Graph (0, 0)][DBLP ] ISCA, 1973, pp:161-165 [Conf ] G. Jack Lipovski On Virtual Memories and Micronetworks. [Citation Graph (0, 0)][DBLP ] ISCA, 1977, pp:125-134 [Conf ] G. Jack Lipovski Retrospective: Banyan Networks for Partitioning Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] 25 Years ISCA: Retrospectives and Reprints, 1998, pp:1- [Conf ] G. Jack Lipovski , Paul Vaughan A Fetch-And-Op Implementation for Parallel Computers. [Citation Graph (0, 0)][DBLP ] ISCA, 1988, pp:384-392 [Conf ] Eli Opper , Miroslaw Malek , G. Jack Lipovski Resource Allocation in Rectangular CC-Banyans [Citation Graph (0, 0)][DBLP ] ISCA, 1983, pp:178-184 [Conf ] Charles H. Radoy , George P. Copeland , G. Jack Lipovski A Methodology for Parallel Processing Design Tradeoffs. [Citation Graph (0, 0)][DBLP ] ISCA, 1973, pp:51-56 [Conf ] Charles H. Radoy , G. Jack Lipovski Switched Multiple Instruction, Multiple Data Stream Processing. [Citation Graph (0, 0)][DBLP ] ISCA, 1974, pp:183-187 [Conf ] Anand R. Tripathi , G. Jack Lipovski Packet Switching in Banyan Networks. [Citation Graph (0, 0)][DBLP ] ISCA, 1979, pp:160-167 [Conf ] Mehrad Yasrebi , G. Jack Lipovski A State-of-the-Art SIMD Two-Dimensional FFT Array Processor. [Citation Graph (0, 0)][DBLP ] ISCA, 1984, pp:21-27 [Conf ] G. Jack Lipovski , Clement T. Yu The Dynamic Associative Access Memory Chip and Its Application to SIMD Processing and Full-Text Database Retrieval. [Citation Graph (0, 0)][DBLP ] MTDT, 1999, pp:24-0 [Conf ] Ambuj Goyal , G. Jack Lipovski Reconfigurable Hierarchical Rings. [Citation Graph (0, 0)][DBLP ] IEEE Real-Time Systems Symposium, 1980, pp:3-10 [Conf ] King-Lup Liu , G. Jack Lipovski , Clement T. Yu , Naphtali Rishe Efficient Processing of One and Two Dimensional Proximity Queries in Associative Memory. [Citation Graph (0, 0)][DBLP ] SIGIR, 1996, pp:138-146 [Conf ] G. Jack Lipovski On Imaginary Fields, Token Transfers and Floating Codes in Intelligent Secondary Memories. [Citation Graph (0, 0)][DBLP ] Computer Architecture for Non-Numeric Processing, 1977, pp:17-22 [Conf ] G. Jack Lipovski Semantic Paging on Intelligent Discs. [Citation Graph (0, 0)][DBLP ] Computer Architecture for Non-Numeric Processing, 1978, pp:30-34 [Conf ] S. J. Ackerman , Ahmed Eman , G. Jack Lipovski , Stanley Y. W. Su Implementation of a Context-Addressed Pipeline3 SIMD Architecture - Abstract. [Citation Graph (0, 0)][DBLP ] SIGIR Forum, 1976, v:10, n:4, pp:27-28 [Journal ] Ahmed Eman , Stanley Y. W. Su , G. Jack Lipovski Software Aspects of the CASSM System - Abstract. [Citation Graph (0, 0)][DBLP ] SIGIR Forum, 1976, v:10, n:4, pp:29-31 [Journal ] G. Jack Lipovski , Stanley Y. W. Su On Non-numeric Architecture. [Citation Graph (0, 0)][DBLP ] SIGIR Forum, 1975, v:10, n:1, pp:5-20 [Journal ] G. Jack Lipovski On a Varistructured Array of Microprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1977, v:26, n:2, pp:125-138 [Journal ] Daniel Tabak , G. Jack Lipovski MOVE Architecture in Digital Controllers. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1980, v:29, n:2, pp:180-190 [Journal ] An organization for optical linkages between integrated circuits. [Citation Graph (, )][DBLP ] An overview of the Texas reconfigurable array computer. [Citation Graph (, )][DBLP ] Design and implementation of the banyan interconnection network in TRAC. [Citation Graph (, )][DBLP ] Organization of the TRAC processor-memory subsystem. [Citation Graph (, )][DBLP ] Lookahead networks. [Citation Graph (, )][DBLP ] A Post-Mortem on CASSM. [Citation Graph (, )][DBLP ] Search in 0.061secs, Finished in 0.064secs