SCEAS

The SCEAS System

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Wentai Liu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

Roberto Salama, Wentai Liu, Ronald S. Gyurcsik
Software experience with concurrent C and LISP in a distributed system. [Citation Graph (0, 0)][DBLP]
ACM Conference on Computer Science, 1988, pp:329-334 [Conf]
Les Hall, Mark Clements, Wentai Liu, Griff L. Bilbro
Clock Distribution Using Cooperative Ring Oscillators. [Citation Graph (0, 0)][DBLP]
ARVLSI, 1997, pp:62-77 [Conf]
Gary C. Moyer, Mark Clements, Wentai Liu, Toby Schaffer, Ralph K. Cavin III
A technique for high-speed, fine-resolution pattern generation and its CMOS implementation. [Citation Graph (0, 0)][DBLP]
ARVLSI, 1995, pp:131-149 [Conf]
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
Low-power design methodology for an on-chip bus with adaptive bandwidth capability. [Citation Graph (0, 0)][DBLP]
DAC, 2003, pp:628-633 [Conf]
Sharad Mehrotra, Paul D. Franzon, Wentai Liu
Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits. [Citation Graph (0, 0)][DBLP]
DAC, 1994, pp:36-40 [Conf]
Liang Zhang, Wentai Liu, Rizwan Bashirullah, John Wilson, Paul D. Franzon
Simplified delay design guidelines for on-chip global interconnects. [Citation Graph (0, 0)][DBLP]
ACM Great Lakes Symposium on VLSI, 2004, pp:29-32 [Conf]
Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III, C. Thomas Gray
Concurrent timing optimization of latch-based digital systems. [Citation Graph (0, 0)][DBLP]
ICCD, 1995, pp:680-0 [Conf]
Gee-gwo Mei, Wentai Liu
Parallel Processing for Quadtree Problems. [Citation Graph (0, 0)][DBLP]
ICPP, 1986, pp:452-454 [Conf]
Wentai Liu, Tong-Fei Yeh, William E. Batchelor, Ralph K. Cavin III
Exploiting Bit Level Concurrency in Real-Time Geometric Feature Extractions. [Citation Graph (0, 0)][DBLP]
ISCA, 1988, pp:167-174 [Conf]
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
Accurate delay model and experimental verification for current/voltage mode on-chip interconnects. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2003, pp:169-172 [Conf]
Rizwan Bashirullah, Wentai Liu, Ying Ji, Gurhan Alper Kendir, Mohanasankar Sivaprakasam, Guoxing Wang, B. Pundi
A smart bi-directional telemetry unit for retinal prosthetic device. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 2003, pp:5-8 [Conf]
T. H. Huang, Ertan Zencir, M. R. Yuce, Numan Sadi Dogan, Wentai Liu, Ercument Arvas
A 22-mW 435 MHz silicon on insulator CMOS high-gain LNA for subsampling receivers. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 2003, pp:417-420 [Conf]
Gurhan Alper Kendir, Wentai Liu, Rizwan Bashirullah, Guoxing Wang, Mark S. Humayun, James D. Weiland
An efficient inductive power link design for retinal prosthesis. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2004, pp:41-44 [Conf]
Wentai Liu, W. Fink, M. Tarbell, Mohanasankar Sivaprakasam
Image processing and interface for retinal visual prostheses. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2005, pp:2927-2930 [Conf]
Gary C. Moyer, Mark Clements, Wentai Liu, Toby Schaffer, Ralph K. Cavin III
High Speed, Fine Resolution Pattern Generation Using the Matched Delay Technique. [Citation Graph (0, 0)][DBLP]
ISCAS, 1995, pp:405-408 [Conf]
Praveen R. Singh, Wentai Liu, Mohanasankar Sivaprakasam, Mark S. Humayun, James D. Weiland
A matched biphasic microstimulator for an implantable retinal prosthetic device. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2004, pp:1-4 [Conf]
Kasin Vichienchom, Wentai Liu
Analysis of phase noise due to bang-bang phase detector in PLL-based clock and data recovery circuits. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 2003, pp:617-620 [Conf]
Guoxing Wang, Wentai Liu, Rizwan Bashirullah, Mohanasankar Sivaprakasam, Gurhan Alper Kendir, Ying Ji, Mark S. Humayun, James D. Weiland
A closed loop transcutaneous power transfer system for implantable devices with enhanced stability. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2004, pp:17-20 [Conf]
Guoxing Wang, Wentai Liu, Mohanasankar Sivaprakasam, Mark S. Humayun, James D. Weiland
Power supply topologies for biphasic stimulation in inductively powered implants. [Citation Graph (0, 0)][DBLP]
ISCAS (3), 2005, pp:2743-2746 [Conf]
Mingcui Zhou, Wentai Liu, Mohanasankar Sivaprakasam
A closed-form delay formula for on-chip RLC interconnects in current-mode signaling. [Citation Graph (0, 0)][DBLP]
ISCAS (2), 2005, pp:1082-1085 [Conf]
Kasin Vichienchom, Mark Clements, Wentai Liu
A multi-gigabit CMOS data recovery circuit using an analog parallel sampling technique. [Citation Graph (0, 0)][DBLP]
ISCAS (4), 2001, pp:238-241 [Conf]
Mark Clements, Kasin Vichienchom, Wentai Liu, C. Hughes, E. McGucken, C. DeMarco, J. Mueller, Mark S. Humayun, E. De Juan, James D. Weiland, R. Greenberg
An implantable power and data receiver and neuro-stimulus chip for a retinal prosthesis system. [Citation Graph (0, 0)][DBLP]
ISCAS (1), 1999, pp:194-197 [Conf]
Mir Azam, Paul D. Franzon, Wentai Liu
Low power data processing by elimination of redundant computations. [Citation Graph (0, 0)][DBLP]
ISLPED, 1997, pp:259-264 [Conf]
Gee-gwo Mei, Wentai Liu, Su-Shing Chen
A Hierarchical Sigma-Pi Neural Architecture for Learning Search Algorithms. [Citation Graph (0, 0)][DBLP]
ISMIS, 1988, pp:374-379 [Conf]
Numan Sadi Dogan, Paul D. Franzon, Wentai Liu
Impact of an SoC Research Project on Microelectronics Education: A Case Study. [Citation Graph (0, 0)][DBLP]
MSE, 2005, pp:33-34 [Conf]
C. Thomas Gray, Thomas A. Hughes, Sanjay Arora, Wentai Liu, Ralph K. Cavin III
Theoretical and Practical Issues in CMOS Wave Pipelining. [Citation Graph (0, 0)][DBLP]
VLSI, 1991, pp:397-409 [Conf]
Thomas H. Hildebrandt, Wentai Liu
Optical recognition of handwritten Chinese characters: Advances since 1980. [Citation Graph (0, 0)][DBLP]
Pattern Recognition, 1993, v:26, n:2, pp:205-225 [Journal]
Wentai Liu, Thomas H. Hildebrandt, Ralph K. Cavin III
Hamiltonian Cycles in the Shuffle-Exchange Network. [Citation Graph (0, 0)][DBLP]
IEEE Trans. Computers, 1989, v:38, n:5, pp:745-750 [Journal]
C. Thomas Gray, Wentai Liu, Ralph K. Cavin III
Timing constraints for wave-pipelined systems. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:8, pp:987-1004 [Journal]
Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III
Integrated parametric timing optimization of digital systems. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:4, pp:482-489 [Journal]
Matthias F. M. Stallmann, Thomas A. Hughes, Wentai Liu
Unconstrained via minimization for topological multilayer routing. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:9, pp:970-980 [Journal]
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III, Dale Edwards
A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 2004, v:12, n:8, pp:876-880 [Journal]
Wentai Liu, Mohanasankar Sivaprakasam, Gang Wang, Moo Sung Chae
A neural recording system for monitoring shark behavior. [Citation Graph (0, 0)][DBLP]
ISCAS, 2006, pp:- [Conf]
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
Current-mode signaling in deep submicrometer global interconnects. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 2003, v:11, n:3, pp:406-417 [Journal]
Evolving Mean Shift with Adaptive Bandwidth: A Fast and Noise Robust Approach. [Citation Graph (, )][DBLP]
A 4-channel wearable wireless neural recording system. [Citation Graph (, )][DBLP]
Spike Feature Extraction Using Informative Samples. [Citation Graph (, )][DBLP]

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NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades

NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP