The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Suchai Thanawastien: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Suchai Thanawastien, Pradip K. Srimani
    A class of modified single stage S/E networks. [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1986, pp:147-154 [Conf]
  2. Anucha Pitaksanonkul, Suchai Thanawastien, Chidchanok Lursinsap, J. A. Gandhi
    DTR: A Defect-Tolerant Routing Algorithm. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:795-798 [Conf]
  3. Suchai Thanawastien, D. Blass
    A CSMA/CD-Token Ring Hybrid Architecture for Local Area Networks. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1986, pp:206-215 [Conf]
  4. Raj Sekhar Pamula, Suchai Thanawastien, Yaakov L. Varol
    On selecting rollback points for error recovery. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1986, v:38, n:3, pp:283-292 [Journal]
  5. Jien-Chung Lo, Suchai Thanawastien
    On the Design of Combinational Totally Self-Checking I-out-of3 Code Checkers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:3, pp:387-393 [Journal]
  6. Jien-Chung Lo, Suchai Thanawastien, T. R. N. Rao
    Berger Check Prediction for Array Multipliers and Array Dividers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:7, pp:892-896 [Journal]
  7. Jien-Chung Lo, Suchai Thanawastien, T. R. N. Rao
    Berger Check Prediction for Array Multipliers and Array Dividers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:3, pp:383- [Journal]
  8. Suchai Thanawastien, Victor P. Nelson
    Interference Analysis of Shuffle/Exchange Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:545-556 [Journal]
  9. Suchai Thanawastien, Pradip K. Srimani
    The Universality of a Class of Modified Single-Stage Shuffle/Exchange Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:3, pp:348-352 [Journal]
  10. Jien-Chung Lo, Suchai Thanawastien, T. R. N. Rao, Michael Nicolaidis
    An SFS Berger check prediction ALU and its application to self-checking processor designs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:4, pp:525-540 [Journal]
  11. Anucha Pitaksanonkul, Suchai Thanawastien, Chidchanok Lursinsap
    Comparisons of quad trees and 4-D trees: new results [VLSI layout]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:11, pp:1157-1164 [Journal]

  12. The shuffle/exchange-plus networks. [Citation Graph (, )][DBLP]


  13. The Integrated Strategic Information System Planning Methodology. [Citation Graph (, )][DBLP]


  14. Thailand's national digital divide strategic framework. [Citation Graph (, )][DBLP]


Search in 0.019secs, Finished in 0.019secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002