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Chang Nian Zhang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. David Y. Y. Yun, Y. Yun, Chang Nian Zhang
    Formal verification of systolic networks using theorem proving techniques (abstract only). [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1987, pp:362- [Conf]
  2. Chang Nian Zhang, Behrooz Shirazi, David Y. Y. Yun
    Computing multiple modulo summation (abstract only): a new algorithm, its VLSI designs and applications. [Citation Graph (0, 0)][DBLP]
    ACM Conference on Computer Science, 1987, pp:438- [Conf]
  3. C. N. Zhang, T. M. Bachtiar, W. K. Chou
    An Optimal Fault-Tolerant Design Approach for Array Processors. [Citation Graph (0, 0)][DBLP]
    ICPADS, 1994, pp:348-353 [Conf]
  4. David Y. Y. Yun, Chang Nian Zhang
    A Programmable Systolic Array for Arithmetic Operations in Galois Fields. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:742-747 [Conf]
  5. Chang Nian Zhang, H. D. Cheng
    Mapping Multiple Problem Instances into a Single Systolic Array with Application to Concurrent Error Detection. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:668-669 [Conf]
  6. Chang Nian Zhang, Behrooz Shirazi, David Y. Y. Yun
    Parallel Designs for Chinese Remainder Conversion. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:557-559 [Conf]
  7. Chang Nian Zhang, David Y. Y. Yun
    Multi-Dimensional Systolic Networks for Discrete Fourier Transform. [Citation Graph (0, 0)][DBLP]
    ISCA, 1984, pp:215-222 [Conf]
  8. Chang-Nian Zhang, Meng Wang
    A Generalized Square-Multiply Algorithm and VLSI Array Implementation for RSA. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1996, pp:1-12 [Conf]
  9. Chang Nian Zhang, Behrooz Shirazi, David Y. Y. Yun
    An Efficient Algorithm and Parallel Implementations for Binary and Residue Number Systems. [Citation Graph (0, 0)][DBLP]
    J. Symb. Comput., 1993, v:15, n:4, pp:451-462 [Journal]
  10. C. N. Zhang, W. K. Chou, N. N. Zhang, J. Xie
    A DSP Based POD Implementation for High Speed Multimedia Communication. [Citation Graph (0, 0)][DBLP]
    ISCA PDCS, 2001, pp:206-210 [Conf]

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