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Donald G. Bailey: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Warwick Allen, Donald Bailey, Serge N. Demidenko, Vincenzo Piuri
    Test Chirp Signal Generation Using Spectral Warping. [Citation Graph (0, 0)][DBLP]
    DELTA, 2002, pp:492-495 [Conf]
  2. K. T. Gribbon, D. G. Bailey
    A Novel Approach to Real-time Bilinear Interpolation. [Citation Graph (0, 0)][DBLP]
    DELTA, 2004, pp:126-134 [Conf]
  3. K. T. Gribbon, D. G. Bailey, C. T. Johnston
    Using Design Patterns to Overcome Image Processing Constraints on FPGAs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:47-56 [Conf]
  4. Donald Bailey
    Harmonic Distortion Measurement using Spectral Warping. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:455-460 [Conf]
  5. Donald Bailey, Warwick Allen, Serge N. Demidenko
    Spectral Warping Revisited. [Citation Graph (0, 0)][DBLP]
    DELTA, 2004, pp:23-28 [Conf]
  6. D. G. Bailey, K. T. Gribbon, C. T. Johnston, Montree Siripruchyanun
    GATOS: A Windowing Operating System for FPGAs. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:405-409 [Conf]
  7. D. G. Bailey, D. Irecki, B. K. Lim, L. Yang
    Test Bed for Number Plate Recognition Applications. [Citation Graph (0, 0)][DBLP]
    DELTA, 2002, pp:501-503 [Conf]
  8. Donald G. Bailey
    Colour Plane Synchronization in Colour Error Diffusion. [Citation Graph (0, 0)][DBLP]
    ICIP (1), 1997, pp:818-821 [Conf]
  9. Nick B. Body, Donald G. Bailey
    Efficient Representation and Decoding of Static Huffman Code Tables in a Very Low Bit Rate Environment. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 1998, pp:90-94 [Conf]
  10. Shikharesh Majumdar, C. Murray Woodside, Donald G. Bailey
    Characterization and Measurement of Parallelism in Communications Protocol Software. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1991, pp:270-271 [Conf]
  11. Donald G. Bailey
    An Efficient Euclidean Distance Transform. [Citation Graph (0, 0)][DBLP]
    IWCIA, 2004, pp:394-408 [Conf]
  12. C. T. Johnston, D. G. Bailey, Paul J. Lyons
    Towards a visual notation for pipelining in a visual programming language for programming FPGAs. [Citation Graph (0, 0)][DBLP]
    CHINZ, 2006, pp:1-9 [Conf]

  13. FPGA implementation of a Single Pass Connected Components Algorithm. [Citation Graph (, )][DBLP]


  14. Interpolation Models for Image Super-resolution. [Citation Graph (, )][DBLP]


  15. Least-squares Optimal Interpolation for Fast Image Super-resolution. [Citation Graph (, )][DBLP]


  16. Algorithm Transformation for FPGA Implementation. [Citation Graph (, )][DBLP]


  17. A Visual Notation for Processor and Resource Scheduling. [Citation Graph (, )][DBLP]


  18. Notations for Multiphase Pipelines. [Citation Graph (, )][DBLP]


  19. Connected components analysis of streamed images. [Citation Graph (, )][DBLP]


  20. User evaluation and overview of a visual language for real time image processing on FPGAs. [Citation Graph (, )][DBLP]


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