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Ching-Yeh Chen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yu-Lin Chang, Ching-Yeh Chen, Shyh-Feng Lin, Liang-Gee Chen
    Motion compensated de-interlacing with adaptive global motion estimation and compensation. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 2003, pp:693-696 [Conf]
  2. Shao-Yi Chien, Ching-Yeh Chen, Wei-Min Chao, Chih-Wei Hsu, Yu-Wen Huang, Liang-Gee Chen
    A fast and high subjective quality sprite generation algorithm with frame skipping and multiple sprites techniques. [Citation Graph (0, 0)][DBLP]
    ICIP (1), 2002, pp:193-196 [Conf]
  3. Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hua Chen, Chung-Jr Lian, Liang-Gee Chen
    System analysis of VLSI architecture for motion-compensated temporal filtering. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 2005, pp:992-995 [Conf]
  4. Yi-Hau Chen, Ching-Yeh Chen, Liang-Gee Chen
    Architecture of global motion compensation for MPEG-4 advanced simple profile. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:1798-1801 [Conf]
  5. Shao-Yi Chien, Ching-Yeh Chen, Wei-Min Chao, Yu-Wen Huang, Liang-Gee Chen
    Analysis and hardware architecture for global motion estimation in MPEG-4 Advanced Simple Profile. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:720-723 [Conf]
  6. Yu-Wen Huang, Chia-Lin Lee, Ching-Yeh Chen, Liang-Gee Chen
    One-pass computation-aware motion estimation with adaptive search strategy. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 2005, pp:5469-5472 [Conf]
  7. Ching-Yeh Chen, Shao-Yi Chien, Wei-Min Chao, Yu-Wen Huang, Liang-Gee Chen
    Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:301-304 [Conf]
  8. Yu-Lin Chang, Shyh-Feng Lin, Ching-Yeh Chen, Liang-Gee Chen
    Video de-interlacing by adaptive 4-field global/local motion compensated approach. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:12, pp:1569-1582 [Journal]
  9. Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Chen-Han Tsai, Ching-Yeh Chen, To-Wei Chen, Liang-Gee Chen
    Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2006, v:16, n:6, pp:673-688 [Journal]
  10. Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hau Chen, Liang-Gee Chen
    Level C+ data reuse scheme for motion estimation with corresponding coding orders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2006, v:16, n:4, pp:553-558 [Journal]
  11. Ching-Yeh Chen, Yi-Hau Chen, Chih-Chi Cheng, Liang-Gee Chen
    Frame-level data reuse for motion-compensated temporal filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  12. Chih-Chi Cheng, Ching-Yeh Chen, Yi-Hau Chen, Liang-Gee Chen
    Analysis and VLSI architecture of update step in motion-compensated temporal filtering. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  13. Yu-Wen Huang, Ching-Yeh Chen, Chen-Han Tsai, Chun-Fu Shen, Liang-Gee Chen
    Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:42, n:3, pp:297-320 [Journal]

  14. Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME. [Citation Graph (, )][DBLP]


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