Search the dblp DataBase

Publications of Author

1. R. Chandramouli
   Managing Test and Repair of Embedded Memory Subsystem in SoC. [Citation Graph (0, 0)][DBLP]
   Asian Test Symposium, 2005, pp:452- [Conf]
   
2. Masood Namjoo, F. Abu-Nofal, Doug Carmean, R. Chandramouli, Y. Chang, J. Goforth, W. Hsu, R. Iwamoto, C. Murphy, U. Naot, Mike Parkin, Joan M. Pendleton, C. Porter, J. Reaves, R. Reddy, George Swan, D. Tinker, P. Tong, L. Yang
   CMOS Custom Implementation of the SPARC Architecture. [Citation Graph (0, 0)][DBLP]
   COMPCON, 1988, pp:18-21 [Conf]
   
3. R. Chandramouli, Hector R. Sucar
   Defect Analysis and Fault Modeling in MOS Technology. [Citation Graph (0, 0)][DBLP]
   ITC, 1985, pp:313-321 [Conf]
   
4. Loïs Guiller, Frederic Neuveux, S. Duggirala, R. Chandramouli, Rohit Kapur
   Integrating DFT in the Physical Synthesis Flow. [Citation Graph (0, 0)][DBLP]
   ITC, 2002, pp:788-795 [Conf]
   
5. R. Chandramouli
   Preface to Special Session on Recent Advances in Wireless Communication. [Citation Graph (0, 0)][DBLP]
   ITCC, 2001, pp:153-0 [Conf]
   
6. R. Chandramouli
   Session Abstract. [Citation Graph (0, 0)][DBLP]
   VTS, 2006, pp:420-421 [Conf]
   
7. R. Chandramouli
   Infrastructure IP design for repair in nanometer technologies. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2005, v:22, n:1, pp:17- [Journal]
   
8. Rohit Kapur, R. Chandramouli, Thomas W. Williams
   Strategies for Low-Cost Test. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:6, pp:47-54 [Journal]
   
9. 
   Economics of Security: Research Challenges. [Citation Graph (, )][DBLP]