Search the dblp DataBase

Publications of Author

1. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh
   A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding. [Citation Graph (0, 0)][DBLP]
   ICME, 2004, pp:1683-1686 [Conf]
   
2. Kuan-Hung Chen, Tzi-Dar Chiueh
   Design and implementation of a reconfigurable FIR filter. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2003, pp:205-208 [Conf]
   
3. Kuan-Hung Chen, Tzi-Dar Chiueh
   Low-complexity adaptive algorithms for pre-distortion of power amplifiers. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2005, pp:5051-5054 [Conf]
   
4. Chun-Nan Chen, Kuan-Hung Chen, Tzi-Dar Chiueh
   Algorithm and architecture design for a low-complexity adaptive equalizer. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2003, pp:304-307 [Conf]
   
5. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang
   An efficient direct 2-D transform coding IP design for MPEG-4 AVC/H.264. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2005, pp:4517-4520 [Conf]
   
6. Kuan-Hung Chen, Shi-Chung Chang, Tzi-Dar Chiueh, Peter B. Luh, Xing Zhao
   SIMD architecture for job shop scheduling problem solving. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2001, pp:530-533 [Conf]
   
7. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Tien-Fu Chen
   A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:141-144 [Conf]
   
8. Kuan-Hung Chen, Kuo-Chuan Chao, Jinn-Shyan Wang, Yuan-Sun Chu, Jiun-In Guo
   An efficient spurious power suppression technique (SPST) and its applications on MPEG-4 AVC/H.264 transform coding design. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2005, pp:155-160 [Conf]
   
9. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang
   A high-performance direct 2-D transform coding IP design for MPEG-4AVC/H.264. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Circuits Syst. Video Techn., 2006, v:16, n:4, pp:472-483 [Journal]
   
10. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Jia-Wei Chen
    An Energy-Aware IP Core Design for the Variable-Length DCT/IDCT Targeting at MPEG4 Shape-Adaptive Transforms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:5, pp:704-715 [Journal]
    
11. Kuan-Hung Chen, Yuan-Sun Chu, Yu-Min Chen, Jiun-In Guo
    A High-Speed/Low-Power Multiplier Using an Advanced Spurious Power Suppression Technique. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3139-3142 [Conf]
    
12. Jia-Wei Chen, Kuan-Hung Chen, Jinn-Shyan Wang, Jiun-In Guo
    A performance-aware IP core design for multimode transform coding using scalable-DA algorithm. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
13. Kuo-Chuan Chao, Kuan-Hung Chen, Yuan-Sun Chu, Jiun-In Guo
    Low-power mechanism with power block management. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
14. Kuan-Hung Chen, Yuan-Sun Chu
    A Low-Power Multiplier With the Spurious Power Suppression Technique. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:7, pp:846-850 [Journal]