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Samir Roy :
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Samir Roy , Biswajit Saha Minority Gate Oriented Logic Design with Quantum-Dot Cellular Automata. [Citation Graph (0, 0)][DBLP ] ACRI, 2006, pp:646-656 [Conf ] Chandrama Shaw , Pradipta Maji , Sourav Saha , Biplab K. Sikdar , Samir Roy , Parimal Pal Chaudhuri Cellular Automata Based Encompression Technology for Voice Data. [Citation Graph (0, 0)][DBLP ] ACRI, 2004, pp:258-267 [Conf ] Samir Roy , Biplab K. Sikdar , Monalisa Mukherjee , Debesh K. Das Degree-Of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area. [Citation Graph (0, 0)][DBLP ] ASP-DAC, 2002, pp:671-676 [Conf ] Samir Roy , Biplab K. Sikdar Power Conscious BIST Design for Sequential Circuits Using ghost-FSM. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2003, pp:190-195 [Conf ] Biplab K. Sikdar , Samir Roy , Debesh K. Das Enhancing BIST Quality of Sequential Machines through Degree-of-Freedom Analysis. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2001, pp:285-0 [Conf ] Biplab K. Sikdar , Arijit Sarkar , Samir Roy , Debesh K. Das Synthesis of Testable Finite State Machine Through Decomposition. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2005, pp:398-403 [Conf ] Santanu Chattopadhyay , Samir Roy , Parimal Pal Chaudhuri Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1995, pp:57-62 [Conf ] S. Nandi , Vamsi Boppana , Supratik Chakraborty , Parimal Pal Chaudhuri , Samir Roy Delay Fault Test Generation with Cellular Automata. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1993, pp:281-286 [Conf ] Samir Roy , U. Maulik , Biplab K. Sikdar Exploiting Ghost-FSMs as a BIST Structure for Sequential Machines. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2003, pp:155-160 [Conf ] Samir Roy , Biplab K. Sikdar , Monalisa Mukherjee , Debesh K. Das Degree-of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2002, pp:671-676 [Conf ] Biplab K. Sikdar , Sukanta Das , Samir Roy , Niloy Ganguly , Debesh K. Das Cellular Automata Based Test Structures with Logic Folding. [Citation Graph (0, 0)][DBLP ] VLSI Design, 2005, pp:71-74 [Conf ] Miklos Feher , Eugen Deretey , Samir Roy BHB: A Simple Knowledge-Based Scoring Function to Improve the Efficiency of Database Screening. [Citation Graph (0, 0)][DBLP ] Journal of Chemical Information and Computer Sciences, 2003, v:43, n:4, pp:1316-1327 [Journal ] Santanu Chattopadhyay , Samir Roy , Parimal Pal Chaudhuri Synthesis of Highly Testable Fixed-Polarity AND-XOR Canonical Networks-A Genetic Algorithm-Based Approach. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:4, pp:487-490 [Journal ] Santanu Chattopadhyay , Samir Roy , Parimal Pal Chaudhuri KGPMIN: an efficient multilevel multioutput AND-OR-XOR minimizer. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:3, pp:257-265 [Journal ] Biplab K. Sikdar , Samir Roy , Debesh K. Das A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced Area. [Citation Graph (0, 0)][DBLP ] J. Electronic Testing, 2005, v:21, n:1, pp:83-93 [Journal ] Search in 0.002secs, Finished in 0.003secs