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R.-Ming Shiu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. S.-K. Cheng, R.-Ming Shiu, Jean Jyh-Jiun Shann
    Decoding Unit with High Issue Rate for X86 Superscalar Microprocessors. [Citation Graph (0, 0)][DBLP]
    ICPADS, 1998, pp:488-495 [Conf]
  2. Shyh-An Chi, R.-Ming Shiu, Jih-Ching Chiu, Si-En Chang, Chung-Ping Chung
    Instruction Cache Prefetching with Extended BTB. [Citation Graph (0, 0)][DBLP]
    ICPADS, 1997, pp:360-0 [Conf]
  3. Hui-Yue Hwang, R.-Ming Shiu, Jean Jyh-Jiun Shann
    An X86 Load/Store Unit with Aggressive Scheduling of Load/Store Operations. [Citation Graph (0, 0)][DBLP]
    ICPADS, 1998, pp:496-503 [Conf]
  4. Chang-Chung Liu, R.-Ming Shiu, Chung-Ping Chung
    Register renaming for x86 superscalar design. [Citation Graph (0, 0)][DBLP]
    ICPADS, 1996, pp:336-343 [Conf]
  5. R.-Ming Shiu, Hui-Yue Hwang, Jean Jyh-Jiun Shann
    Aggressive Schduling for Memory Accesses of CISC Superscalar Microprocessors. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 2001, v:17, n:5, pp:787-803 [Journal]
  6. R.-Ming Shiu, Neng-Pin Lu, Chung-Ping Chung
    Applying stack simulation for branch target buffers. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 2000, v:52, n:1, pp:67-78 [Journal]

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