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Ahmed El-Amawy :
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Jorge L. Aravena , Ahmed El-Amawy Time Optimal Operation of Heterogeneous Arrays. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1989, pp:266-269 [Conf ] Ahmed El-Amawy Branch-and-Combine Clocking of Arbitrarily Large Computing Networks. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1991, pp:409-417 [Conf ] Ahmed El-Amawy , Priyalal Kulasinghe Theory of Generalized Branch and Combine Clock Networks. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1994, pp:34-37 [Conf ] Jung-Joon Kim , Ahmed El-Amawy Performance and Architectural Features of Segmented Multiple Bus System. [Citation Graph (0, 0)][DBLP ] ICPP, 1999, pp:154-0 [Conf ] Shahram Latifi , Ahmed El-Amawy On Folded Hypercubes. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1989, pp:180-187 [Conf ] Martin Feldman , Ramachandran Vaidyanathan , Ahmed El-Amawy High Speed, High Capacity Bused Interconnects using Optical Slab Waveguides. [Citation Graph (0, 0)][DBLP ] IPPS/SPDP Workshops, 1999, pp:924-937 [Conf ] Martin Feldman , Ahmed El-Amawy , Ramachandran Vaidyanathan Free Space All-optical Crossconnect. [Citation Graph (0, 0)][DBLP ] IASTED PDCS, 2002, pp:823-828 [Conf ] Ahmed El-Amawy , Shahram Latifi Bridged Hypercube Networks. [Citation Graph (0, 0)][DBLP ] J. Parallel Distrib. Comput., 1990, v:10, n:1, pp:90-95 [Journal ] Priyalal Kulasinghe , Ahmed El-Amawy On Achieving Maximum Performance in Time-Varying Arrays. [Citation Graph (0, 0)][DBLP ] J. Parallel Distrib. Comput., 1995, v:31, n:2, pp:101-111 [Journal ] Behnam S. Arad , Ahmed El-Amawy On Fault Tolerant Training of Feedforward Neural Networks. [Citation Graph (0, 0)][DBLP ] Neural Networks, 1997, v:10, n:3, pp:539-553 [Journal ] H. Barada , Ahmed El-Amawy A Methodology for Algorithm Regularization and Mapping Into Time-Optimal VLSI Arrays. [Citation Graph (0, 0)][DBLP ] Parallel Computing, 1993, v:19, n:1, pp:33-61 [Journal ] Ahmed El-Amawy , Ramachander Raja Split Sequence Generation Algorithms for Efficient Identification of Operational Subcubes in Faulty Hypercubes. [Citation Graph (0, 0)][DBLP ] Parallel Computing, 1993, v:19, n:7, pp:789-805 [Journal ] Ahmed El-Amawy A Systolic Architecture for Fast Dense Matrix Inversion. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:3, pp:449-455 [Journal ] Ahmed El-Amawy Comments on "Can Redundancy and Masking Improve the Performance of Synchronizers?". [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1989, v:38, n:5, pp:750-753 [Journal ] Ahmed El-Amawy , Priyalal Kulasinghe On the Complexity of Designing Optimal Branch-and-Combine Clock Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1998, v:47, n:2, pp:264-269 [Journal ] Ahmed El-Amawy , Morteza Naraghi-Pour , Manju V. Hegde Noise Modeling Effects in Redundant Synchronizers. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1993, v:42, n:12, pp:1487-1494 [Journal ] Ahmed El-Amawy , Yi Chang Tseng Maximum Performance Pipelines With Switchable Reservation Tables. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:8, pp:1066-1069 [Journal ] Priyalal Kulasinghe , Ahmed El-Amawy On the Complexity of Optimal Bused Interconnections. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:10, pp:1248-1251 [Journal ] Priyalal Kulasinghe , Ahmed El-Amawy Optimal Realization of Sets of Interconnection Functions on Synchronous Multiple Bus Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1996, v:45, n:8, pp:964-969 [Journal ] Behnam S. Arad , Ahmed El-Amawy Mapping a class of neural networks on k-ary n-cubes. [Citation Graph (0, 0)][DBLP ] Telecommunication Systems, 1998, v:10, n:1, pp:67-78 [Journal ] Ahmed El-Amawy Clocking Arbitrarily Large Computing Structures Under Constant Skew Bound. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:3, pp:241-255 [Journal ] Ahmed El-Amawy , Priyalal Kulasinghe Properties of Generalized Branch and Combine Clock Networks. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:5, pp:541-546 [Journal ] Ahmed El-Amawy , Priyalal Kulasinghe Algorithmic Mapping of Feedforward Neural Networks onto Multiple Bus Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1997, v:8, n:2, pp:130-136 [Journal ] Ahmed El-Amawy , Shahram Latifi Properties and Performance of Folded Hypercubes. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1991, v:2, n:1, pp:31-42 [Journal ] Maheshwar Umasankar , Ahmed El-Amawy Generalized Algorithms for Systematic Synthesis of Branch-and-Combine Clock Networks for Meshes, Tori, and Hypercubes. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1995, v:6, n:12, pp:1283-1300 [Journal ] Search in 0.002secs, Finished in 0.303secs