The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Liqun Cheng: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Liqun Cheng, John B. Carter
    Fast Barriers for Scalable ccNUMA Systems. [Citation Graph (0, 0)][DBLP]
    ICPP, 2005, pp:241-250 [Conf]
  2. Liqun Cheng, Naveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian, John B. Carter
    Interconnect-Aware Coherence Protocols for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:339-351 [Conf]
  3. Zhen Fang, Lixin Zhang, John B. Carter, Liqun Cheng, Michael Parker
    Fast synchronization on shared-memory multiprocessors: An architectural approach. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 2005, v:65, n:10, pp:1158-1170 [Journal]
  4. Rajeev Balasubramonian, Naveen Muralimanohar, Karthik Ramani, Liqun Cheng, John B. Carter
    Leveraging Wire Properties at the Microarchitecture Level. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2006, v:26, n:6, pp:40-52 [Journal]

  5. NCID: a non-inclusive cache, inclusive directory architecture for flexible and efficient cache hierarchies. [Citation Graph (, )][DBLP]


  6. An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing. [Citation Graph (, )][DBLP]


  7. Extending CC-NUMA systems to support write update optimizations. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002