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Yu-Chen Tsai: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Viktor K. Prasanna, Yu-Chen Tsai
    Mapping Two Dimensional Systolic Arrays to One Dimensional Arrays and Applications. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1988, pp:39-46 [Conf]
  2. Viktor K. Prasanna, Yu-Chen Tsai
    Designing Linear Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1989, v:7, n:3, pp:441-463 [Journal]
  3. Viktor K. Prasanna, Yu-Chen Tsai
    On Mapping Algorithms to Linear and Fault-Tolerant Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:470-478 [Journal]
  4. Viktor K. Prasanna, Yu-Chen Tsai
    On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:6, pp:770-774 [Journal]
  5. Shyue-Kung Lu, Yu-Chen Tsai, Chih-Hsien Hsu, Kuo-Hua Wang, Cheng-Wen Wu
    Efficient built-in redundancy analysis for embedded memories with 2-D redundancy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2006, v:14, n:1, pp:34-42 [Journal]

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