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K. Sridharan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. K. Sridharan, Matthew J. McShea, Carole Denton, William Eventoff, James C. Browne, Peter Newton, M. Ellis, D. Grossbard, T. Wise, David E. Clemmer
    An Environment for Parallel Structuring for Fortran Programs. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1989, pp:98-106 [Conf]
  2. K. Sridharan, Ravi Narayanaswamy, Carole Denton, William Eventoff
    Parallel Structuring of Programs Containing I/O Statements. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1990, pp:224-228 [Conf]
  3. K. Sridharan, Harry E. Stephanou
    Algorithms for Rapid Computation of Some Distance Functions Between Objects for Path Planning. [Citation Graph (0, 0)][DBLP]
    ICRA, 1994, pp:967-973 [Conf]
  4. K. Sridharan, Harry E. Stephanou, S. Sathiya Keerthi
    On Computing a Distance Measure for Path Planning. [Citation Graph (0, 0)][DBLP]
    ICRA (1), 1993, pp:554-559 [Conf]
  5. N. Sudha, S. Nandi, K. Sridharan
    A Parallel Algorithm to Construct Voronoi Diagram and Its VLSI Architecture. [Citation Graph (0, 0)][DBLP]
    ICRA, 1999, pp:1683-1688 [Conf]
  6. K. Sridharan, Harry E. Stephanou
    Fuzzy Distance Functions for Motion Planning. [Citation Graph (0, 0)][DBLP]
    ICTAI, 1992, pp:186-189 [Conf]
  7. K. Sridharan, Pohua P. Chang, Utpal Banerjee, Ravi Narayanaswamy, Suresh Rao
    Memory Optimizations in the Intel Reference Compiler. [Citation Graph (0, 0)][DBLP]
    LCPC, 1996, pp:608-610 [Conf]
  8. T. K. Priya, K. Sridharan
    An Efficient Algorithm to Construct Reduced Visibility Graph and Its FPGA Implementation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:1057-1062 [Conf]
  9. K. Sridharan
    Efficient computation of a measure of depth between convex objects for graphics applications. [Citation Graph (0, 0)][DBLP]
    Computers & Graphics, 2002, v:26, n:5, pp:785-793 [Journal]
  10. K. Sridharan
    Computing two penetration measures for curved 2D objects. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1999, v:72, n:3-4, pp:143-148 [Journal]
  11. K. Sridharan, Harry E. Stephanou, K. C. Craig, S. Sathiya Keerthi
    Distance Measures on Intersecting Objects and Their Applications. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1994, v:51, n:4, pp:181-188 [Journal]
  12. K. Sridharan, T. K. Priya
    A parallel algorithm for constructing reduced visibility graph and its FPGA implementation. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2004, v:50, n:10, pp:635-644 [Journal]
  13. P. Rajesh Kumar, K. Sridharan, S. Srinivasan
    A parallel algorithm, architecture and FPGA realization for landmark determination and map construction in a planar unknown environment. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2006, v:32, n:3, pp:205-221 [Journal]
  14. Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan
    VLSI-efficient schemes for high-speed construction of tangent graph. [Citation Graph (0, 0)][DBLP]
    Robotics and Autonomous Systems, 2005, v:51, n:4, pp:248-260 [Journal]
  15. T. K. Priya, P. Rajesh Kumar, K. Sridharan
    A hardware-efficient scheme and FPGA realization for computation of single pair shortest path for a mobile automaton. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:7, pp:413-424 [Journal]
  16. T. K. Priya, K. Sridharan
    A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:1, pp:1-14 [Journal]
  17. P. Rajesh Kumar, K. Sridharan
    VLSI-Efficient Scheme and FPGA Realization for Robotic Mapping in a Dynamic Environment. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:1, pp:118-123 [Journal]

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