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Publications of Author

1. Valerio Gabbani, Santina Rocchi, Valerio Vignoli
   Multielement Ultrasonic System for Robotic Navigation. [Citation Graph (0, 0)][DBLP]
   ICRA, 1995, pp:3009-3014 [Conf]
   
2. Massimo Alioto, Ada Fort, Luca Pancioni, Santina Rocchi, Valerio Vignoli
   An approach to the design of PFSCL gates. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2005, pp:2437-2440 [Conf]
   
3. Tommaso Addabbo, Massimo Alioto, Ada Fort, Santina Rocchi, Valerio Vignoli
   Long period pseudo random bit generators derived from a discretized chaotic map. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:892-895 [Conf]
   
4. Santina Rocchi, Valerio Vignoli
   A chaotic CMOS true-random analog/digital white noise generator. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 1999, pp:463-466 [Conf]
   
5. Massimo Alioto, Ada Fort, Luca Pancioni, Santina Rocchi, Valerio Vignoli
   Positive-Feedback Source-Coupled Logic: a delay model. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:641-644 [Conf]
   
6. Mauro Forti, Luca Pancioni, Santina Rocchi, Valerio Vignoli
   Accurate CMOS implementation of PWL CNN neuron activations. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2002, pp:221-224 [Conf]
   
7. Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli
   Power Modeling of Precharged Address Bus and Application to Multi-bit DPA Attacks to DES Algorithm. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2006, pp:593-602 [Conf]
   
8. Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli
   Techniques to Enhance the Resistance of Precharged Busses to Differential Power Analysis. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2006, pp:624-633 [Conf]
   
9. Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli
   Mixed Techniques to Protect Precharged Busses against Differential Power Analysis Attacks. [Citation Graph (0, 0)][DBLP]
   ISCAS, 2007, pp:861-864 [Conf]
   
10. Tommaso Addabbo, Massimo Alioto, Ada Fort, Santina Rocchi, Valerio Vignoli
    Maximum-Period PRNGs Derived From A Piecewise Linear One-Dimensional Map. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:693-696 [Conf]
    
11. Tommaso Addabbo, Massimo Alioto, Ada Fort, Santina Rocchi, Valerio Vignoli
    A technique to design high entropy chaos-based true random bit generators. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
12. Massimo Alioto, Luca Pancioni, Santina Rocchi, Valerio Vignoli
    Analysis and design of MCML gates with hysteresis. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
    
13. 
    Analysis and performance evaluation of area-efficient true random bit generators on FPGAs. [Citation Graph (, )][DBLP]
    
    
14. 
    A general model for differential power analysis attacks to static logic circuits. [Citation Graph (, )][DBLP]
    
    
15. 
    An efficient and accurate method for computing the invariant measure of piecewise affine chaotic maps. [Citation Graph (, )][DBLP]