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Grant Martin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Grant Martin
    The Reality of System Design Today: Do Theory and Practice Meet? [Citation Graph (0, 0)][DBLP]
    ACSD, 2003, pp:3- [Conf]
  2. Grant Martin
    Recent Developments in Configurable and Extensible Processors. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:39-44 [Conf]
  3. Alberto L. Sangiovanni-Vincentelli, Grant Martin
    A vision for embedded software. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:1-7 [Conf]
  4. Reinaldo A. Bergamaschi, Grant Martin
    System-level design tools: who needs them, who has them, and how much should they cost? [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:79-80 [Conf]
  5. Reinaldo A. Bergamaschi, Grant Martin, Wayne Wolf, Rolf Ernst, Kees A. Vissers, Jack Kouloheris
    The future of system-level design: can we find the right solutions to the right problems at the right time? [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:231- [Conf]
  6. Mark Genoe, Christopher K. Lennard, Joachim Kunkel, Brian Bailey, Gjalt G. de Jong, Grant Martin, M. M. Kamal Hashmi, Shay Ben-Chorin, Anssi Haverinen
    How standards will enable hardware/software co-design. [Citation Graph (0, 0)][DBLP]
    CODES, 1999, pp:211-212 [Conf]
  7. Grant Martin, Daniel Gajski, David Goodwin, Patrick Lysaght, Peter Marwedel, Mike Muller, Jeff Welser
    What will system level design be when it grows up? [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:123- [Conf]
  8. Grant Martin, Luciano Lavagno, Jean Louis-Guerin
    Embedded UML: a merger of real-time UML and co-design. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:23-28 [Conf]
  9. Grant Martin
    Overview of the MPSoC design challenge. [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:274-279 [Conf]
  10. Gary Smith, Daya Nadamuni, Sharad Malik, Rick Chapman, John Fogelin, Kurt Keutzer, Grant Martin, Brian Bailey
    Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant? [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:479- [Conf]
  11. Francky Catthoor, Andrea Cuomo, Grant Martin, Patrick Groeneveld, Rudy Lauwereins, Karen Maex, Patrick van de Steeg, Ron Wilson
    How Can System-Level Design Solve the Interconnect Technology Scaling Problem? [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:332-339 [Conf]
  12. Rolf Ernst, Grant Martin, Oz Levia, Pierre G. Paulin, Stamatis Vassiliadis, Kees A. Vissers
    The Future of Flexible HW Platform Architectures Panel Discussion. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:634-0 [Conf]
  13. Paolo Giusto, Grant Martin, Edwin A. Harcourt
    Reliable estimation of execution time of embedded software. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:580-589 [Conf]
  14. Grant Martin
    How to Choose Semiconductor IP: Embedded Software. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:16- [Conf]
  15. Grant Martin
    UML for Embedded Systems Specification and Design: Motivation and Overview. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:773-775 [Conf]
  16. Grant Martin
    Design Methodologies for System Level IP. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:286-289 [Conf]
  17. Donatella Sciuto, Grant Martin, Wolfgang Rosenstiel, Stuart Swan, Frank Ghenassia, Peter Flake, Johny Srouji
    SystemC and SystemVerilog: Where do They Fit? Where are They Going? [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:122-129 [Conf]
  18. S. J. Krolikoski, Frank Schirrmeister, B. Salefski, J. Rowson, Grant Martin
    Methodology and technology for virtual component driven hardware/software co-design on the system-level. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:456-459 [Conf]
  19. Grant Martin, Sandeep K. Shukla
    Hierarchical and Incremental Verification for System Level Design: Challenges and Accomplishments. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2003, pp:97-0 [Conf]
  20. Grant Martin
    Industry Needs and Expectations of SoC Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:146-147 [Conf]
  21. Grant Martin
    SystemC: From Language to Applications, from Tools to Methodologies. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:3- [Conf]
  22. Grant Martin
    SystemC and the Future of Design Languages: Opportunities for Users and Research. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:61- [Conf]
  23. Grant Martin
    Surviving the SOC Revolution: The Platform Approach to SOC Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:325-0 [Conf]
  24. Grant Martin, Jeffrey B. Schamburg, Michael J. Kwinn Jr.
    Acquisition-based simulation. [Citation Graph (0, 0)][DBLP]
    Winter Simulation Conference, 2005, pp:1213-1219 [Conf]
  25. Grant Martin, Frank Schirrmeister
    A Design Chain for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2002, v:35, n:3, pp:100-103 [Journal]
  26. Eric Dupont, Grant Martin
    Panel Summaries. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:100-102 [Journal]
  27. Andrew B. Kahng, Grant Martin
    DAC Highlights. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:3, pp:197-199 [Journal]
  28. Grant Martin
    Guest Editor's Introduction: The Reuse of Complex Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:6, pp:4-5 [Journal]
  29. Grant Martin
    The network is the chip. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:184-185 [Journal]
  30. Grant Martin
    Wireless, ESL, DFM, and Power on Stage at 42nd DAC. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:5, pp:397-398 [Journal]
  31. Grant Martin
    Verification by the pound. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:5, pp:478-479 [Journal]
  32. Grant Martin
    The First Transaction, but not the Last. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:3, pp:248-249 [Journal]
  33. Alberto L. Sangiovanni-Vincentelli, Grant Martin
    Platform-Based Design and Software Design Methodology for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:6, pp:23-33 [Journal]
  34. Sachin S. Sapatnekar, Grant Martin
    DAC Highlights. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:3, pp:182-184 [Journal]

  35. Configurable Multi-Processor Platforms for Next Generation Embedded Systems. [Citation Graph (, )][DBLP]

  36. Panel: Best ways to use billions of devices on a chip. [Citation Graph (, )][DBLP]

  37. Automatically Realising Embedded Systems from High-Level Functional Models. [Citation Graph (, )][DBLP]

  38. Panel 6.8: The challenges of heterogeneous multicore debug. [Citation Graph (, )][DBLP]

  39. Transistor placement and interconnect algorithms for leaf cell synthesis. [Citation Graph (, )][DBLP]

  40. "Slower than you think" - The evolution of processor and SoC architectures. [Citation Graph (, )][DBLP]

  41. A Decade of Platform-Based Design: A look backwards, a look forwards. [Citation Graph (, )][DBLP]

  42. Design and verification of complex SoC with configurable, extensible processors. [Citation Graph (, )][DBLP]

  43. Everything but the kitchen sink. [Citation Graph (, )][DBLP]

  44. Making a List...Checking it Twice. [Citation Graph (, )][DBLP]

  45. Book Reviews: NoC, NoC ... Who's there? [Citation Graph (, )][DBLP]

  46. Learning to assert yourself [review of Creating Assertion-Based IP (H.D. Foster and A.C. Krolnik; 2008)]. [Citation Graph (, )][DBLP]

  47. The two faces of high-level synthesis [review of High-Level Synthesis: From Algorithm to Digital Circuit (Coussy, P. and Morawiec, A., Eds., 2008)]. [Citation Graph (, )][DBLP]

  48. Processor Stew (review of Processor Description Languages by P. Mishra and N. Dutt, Eds.; 2008) [Book reviews]. [Citation Graph (, )][DBLP]

  49. Teaching someone to fish. [Citation Graph (, )][DBLP]

  50. High-Level Synthesis: Past, Present, and Future. [Citation Graph (, )][DBLP]

  51. A career in system-level design research. [Citation Graph (, )][DBLP]

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