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Bart D. Theelen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Marc Geilen, Twan Basten, Bart D. Theelen, Ralph Otten
    An Algebra of Pareto Points. [Citation Graph (0, 0)][DBLP]
    ACSD, 2005, pp:88-97 [Conf]
  2. Amir Hossein Ghamarian, Marc Geilen, Sander Stuijk, Twan Basten, Bart D. Theelen, Mohammad Reza Mousavi, A. J. M. Moonen, Marco Bekooij
    Throughput Analysis of Synchronous Data Flow Graphs. [Citation Graph (0, 0)][DBLP]
    ACSD, 2006, pp:25-36 [Conf]
  3. Bart D. Theelen, A. C. Verschueren
    Architecture Design of a Scalable Single-Chip Multi-Processor. [Citation Graph (0, 0)][DBLP]
    DSD, 2002, pp:132-139 [Conf]
  4. Sander Stuijk, Twan Basten, Marc Geilen, Amir Hossein Ghamarian, Bart D. Theelen
    Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:45-52 [Conf]
  5. Amir Hossein Ghamarian, Marc Geilen, Twan Basten, Bart D. Theelen, Mohammad Reza Mousavi, Sander Stuijk
    Liveness and Boundedness of Synchronous Data Flow Graphs. [Citation Graph (0, 0)][DBLP]
    FMCAD, 2006, pp:68-75 [Conf]
  6. Bart D. Theelen, Jeroen Voeten, R. D. J. Kramer
    Performance modelling of a network processor using POOSL. [Citation Graph (0, 0)][DBLP]
    Computer Networks, 2003, v:41, n:5, pp:667-684 [Journal]
  7. Bart D. Theelen, A. C. Verschueren, V. V. Reyes Suárez, M. P. J. Stevens, A. Nuñez
    A scalable single-chip multi-processor architecture with on-chip RTOS kernel. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2003, v:49, n:12-15, pp:619-639 [Journal]
  8. Akash Kumar, Bart Mesman, Henk Corporaal, Bart D. Theelen, Yajun Ha
    A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:726-731 [Conf]
  9. Bart D. Theelen, Marc Geilen, Twan Basten, Jeroen Voeten, Stefan Valentin Gheorghita, Sander Stuijk
    A scenario-aware data flow model for combined long-run average and worst-case performance analysis. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2006, pp:185-194 [Conf]
  10. Bart D. Theelen, Oana Florescu, Marc Geilen, Jinfeng Huang, P. H. A. van der Putten, Jeroen Voeten
    Software/Hardware Engineering with the Parallel Object-Oriented Specification Language. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2007, pp:139-148 [Conf]

  11. A predictable communication assist. [Citation Graph (, )][DBLP]


  12. Latency Minimization for Synchronous Data Flow Graphs. [Citation Graph (, )][DBLP]


  13. Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip. [Citation Graph (, )][DBLP]


  14. A Performance Analysis Tool for Scenario-Aware Streaming Applications. [Citation Graph (, )][DBLP]


  15. Performance Model Generation for MPSoC Design-Space Exploration. [Citation Graph (, )][DBLP]


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