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Tiberiu Seceleanu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tiberiu Seceleanu, Axel Jantsch
    Communicating with Synchronized Environments. [Citation Graph (0, 0)][DBLP]
    ACSD, 2006, pp:15-24 [Conf]
  2. Tiberiu Seceleanu, Juha Plosila
    Formal Pipeline Design. [Citation Graph (0, 0)][DBLP]
    CHARME, 2001, pp:167-172 [Conf]
  3. Tiberiu Seceleanu, David Garlan
    Synchronized Architectures for Adaptive Systems. [Citation Graph (0, 0)][DBLP]
    COMPSAC (2), 2005, pp:146-151 [Conf]
  4. Cristina Cerschi Seceleanu, Tiberiu Seceleanu
    Modular Design of Reactive Systems. [Citation Graph (0, 0)][DBLP]
    COMPSAC, 2004, pp:265-271 [Conf]
  5. Tuomas Lindroth, Raicea Lavinia, Tiberiu Seceleanu, Nastooh Avessta, Jukka Teuhola
    Building a UML Profile for On-Chip Distributed Platforms. [Citation Graph (0, 0)][DBLP]
    COMPSAC (2), 2006, pp:372-373 [Conf]
  6. Tiberiu Seceleanu, Tomi Westerlund
    Aspects of Formal and Graphical Design of a Bus System. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:396-403 [Conf]
  7. Juha Plosila, Tiberiu Seceleanu
    Specification of an Asynchronous On-chip Bus. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2002, pp:383-395 [Conf]
  8. Tiberiu Seceleanu, Juha Plosila
    Constituent Elements of a Correctness-Preserving UML Design Approach. [Citation Graph (0, 0)][DBLP]
    IFM, 2004, pp:227-246 [Conf]
  9. Juha Plosila, Tiberiu Seceleanu
    Design of Synchronous Action Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:578-583 [Conf]
  10. Juha Plosila, Tiberiu Seceleanu, Pasi Liljeberg
    Implementation of a Self-Timed Segmented Bus. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:44-50 [Journal]
  11. Tiberiu Seceleanu
    The SegBus platform - architecture and communication mechanisms. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:4, pp:151-169 [Journal]
  12. Tiberiu Seceleanu, David Garlan
    Developing adaptive systems with synchronized architectures. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 2006, v:79, n:11, pp:1514-1526 [Journal]
  13. Cristina Cerschi Seceleanu, Tiberiu Seceleanu
    Synchronization Can Improve Reactive Systems Control and Modularity. [Citation Graph (0, 0)][DBLP]
    J. UCS, 2004, v:10, n:10, pp:1429-1468 [Journal]
  14. Dragos Truscan, Tiberiu Seceleanu, Hannu Tenhunen, Johan Lilius
    Towards a Design Methodology for Multiprocessor Platforms. [Citation Graph (0, 0)][DBLP]
    COMPSAC (1), 2007, pp:575-578 [Conf]

  15. Message from the IEESD 2008 Workshop Organizers. [Citation Graph (, )][DBLP]


  16. IEESD 2008 Workshop Organization. [Citation Graph (, )][DBLP]


  17. Transaction Level Control for Application Execution on the SegBus Platform. [Citation Graph (, )][DBLP]


  18. A Model-Based Design Process for the SegBus Distributed Architecture. [Citation Graph (, )][DBLP]


  19. An Emulation Solution for the SegBus Platform. [Citation Graph (, )][DBLP]


  20. Power and Area Efficient Design of Network-on-Chip Router through Utilization of Idle Buffers. [Citation Graph (, )][DBLP]


  21. Complexity Analysis of H.264 Decoder for FPGA Design. [Citation Graph (, )][DBLP]


  22. Application development flow for on-chip distributed architectures. [Citation Graph (, )][DBLP]


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