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Paul Racunas: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Paul Racunas, Yale N. Patt
    Partitioned first-level cache design for clustered microarchitectures. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:22-31 [Conf]
  2. Arijit Biswas, Paul Racunas, Razvan Cheveresan, Joel S. Emer, Shubhendu S. Mukherjee, Ram Rangan
    Computing Architectural Vulnerability Factors for Address-Based Structures. [Citation Graph (0, 0)][DBLP]
    ISCA, 2005, pp:532-543 [Conf]
  3. Jared Stark, Paul Racunas, Yale N. Patt
    Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-Order. [Citation Graph (0, 0)][DBLP]
    MICRO, 1997, pp:34-43 [Conf]

  4. Perturbation-based Fault Screening. [Citation Graph (, )][DBLP]


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