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Publications of Author

1. Vassilis Papaefstathiou, Ioannis Papaefstathiou
   A hardware-engine for layer-2 classification in low-storage, ultra-high bandwidth environments. [Citation Graph (0, 0)][DBLP]
   DATE Designers' Forum, 2006, pp:112-117 [Conf]
   
2. Manolis Marazakis, Konstantinos Xinidis, Vassilis Papaefstathiou, Angelos Bilas
   Efficient remote block-level I/O over an RDMA-capable NIC. [Citation Graph (0, 0)][DBLP]
   ICS, 2006, pp:97-106 [Conf]
   
3. Vassilis Papaefstathiou, Ioannis Papaefstathiou
   A Memory Efficient, 100 Gb/sec MAC Classification Engine. [Citation Graph (0, 0)][DBLP]
   LCN, 2005, pp:470-471 [Conf]
   
4. Ioannis Papaefstathiou, Vassilis Papaefstathiou, C. Sotiriou
   Design-space exploration of the most widely used cryptography algorithms. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2004, v:28, n:10, pp:561-571 [Journal]
   
5. Manolis Marazakis, Vassilis Papaefstathiou, Giorgos Kalokairinos, Angelos Bilas
   Experiences from Debugging a PCIX-based RDMA-capable NIC. [Citation Graph (0, 0)][DBLP]
   CLUSTER, 2006, pp:- [Conf]
   
6. Manolis Marazakis, Vassilis Papaefstathiou, Angelos Bilas
   Optimization and bottleneck analysis of network block I/O in commodity storage systems. [Citation Graph (0, 0)][DBLP]
   ICS, 2007, pp:33-42 [Conf]
   
7. Ioannis Papaefstathiou, Vassilis Papaefstathiou
   Memory-Efficient 5D Packet Classification At 40 Gbps. [Citation Graph (0, 0)][DBLP]
   INFOCOM, 2007, pp:1370-1378 [Conf]
   
8. Vassilis Papaefstathiou, Dionisios N. Pnevmatikatos, Manolis Marazakis, Giorgos Kalokairinos, Aggelos Ioannou, Michael Papamichael, Stamatis Kavadias, Giorgos Mihelogiannakis, Manolis Katevenis
   Prototyping Efficient Interprocessor Communication Mechanisms. [Citation Graph (0, 0)][DBLP]
   ICSAMOS, 2007, pp:26-33 [Conf]
   
9. 
   FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability. [Citation Graph (, )][DBLP]