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Cristiano Lazzari: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Cristiano Lazzari
    Automatic Full-Custom Layout Generation of Static CMOS Circuits Targeting Delay and Power Reduction. [Citation Graph (0, 0)][DBLP]
    IFIP Student Forum, 2004, pp:177-186 [Conf]
  2. Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel
    Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2006, pp:165-172 [Conf]
  3. Cristiano Lazzari, Lorena Anghel, Ricardo A. L. Reis
    On Implementing a Soft Error Hardening Technique by Using an Automatic Layout Generator: Case Study. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:29-34 [Conf]
  4. Fabricio B. Bastian, Cristiano Lazzari, José Luís Almada Güntzel, Ricardo Reis
    A New Transistor Folding Algorithm Applied to an Automatic Full-Custom Layout Generation Tool. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:732-741 [Conf]
  5. Cristiano Santos, Gustavo Wilke, Cristiano Lazzari, Ricardo Reis, José Luís Almada Güntzel
    A Transistor Sizing Method Applied to an Automatic Layout Generation Tool. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:303-0 [Conf]
  6. Cristiano Lazzari, Cristiano Viana Domingues, José Luís Almada Güntzel, Ricardo Augusto da Luz Reis
    A New Macro-cell Generation Strategy for three metal layer CMOS Technologies. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:193-197 [Conf]
  7. Cristiano Lazzari, Lorena Anghel, Ricardo Reis
    A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2005, pp:331-344 [Conf]

  8. A new quaternary FPGA based on a voltage-mode multi-valued circuit. [Citation Graph (, )][DBLP]

  9. Efficient timing closure with a transistor level design flow. [Citation Graph (, )][DBLP]

  10. Transistor level automatic layout generator for non-complementary CMOS cells. [Citation Graph (, )][DBLP]

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