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Shambhu J. Upadhyaya :
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Manish Agrawal , Hemant Padmanabhan , Lokesh Pandey , H. Raghav Rao , Shambhu J. Upadhyaya A conceptual approach to information security in financial account aggregation. [Citation Graph (0, 0)][DBLP ] ICEC, 2004, pp:619-626 [Conf ] Ramkumar Chinchani , Aarthie Muthukrishnan , Madhusudhanan Chandrasekaran , Shambhu J. Upadhyaya RACOON: Rapidly Generating User Command Data For Anomaly Detection From Customizable Templates. [Citation Graph (0, 0)][DBLP ] ACSAC, 2004, pp:189-204 [Conf ] Suranjan Pramanik , Vidyaraman Sankaranarayanan , Shambhu J. Upadhyaya Security Policies to Mitigate Insider Threat in the Document Control Domain. [Citation Graph (0, 0)][DBLP ] ACSAC, 2004, pp:304-313 [Conf ] Madhusudhanan Chandrasekaran , Mukarram Baig , Shambhu J. Upadhyaya AEGIS: A Proactive Methodology to Shield against Zero-Day Exploits. [Citation Graph (0, 0)][DBLP ] AINA Workshops (2), 2007, pp:556-563 [Conf ] Vidyaraman Sankaranarayanan , Shambhu J. Upadhyaya , Kevin A. Kwiat QoS-LI: QoS Loss Inference in Disadvantaged Networks. [Citation Graph (0, 0)][DBLP ] AINA Workshops (2), 2007, pp:524-529 [Conf ] Tien-Chung Tien , Shambhu J. Upadhyaya A Local/Global Strategy Based on Signal Strength for Message Routing in Wireless Mobile Ad-Hoc Networks. [Citation Graph (0, 0)][DBLP ] AIWoRC, 2000, pp:227-232 [Conf ] Ashish Garg , Vidyaraman Sankaranarayanan , Shambhu J. Upadhyaya , Kevin A. Kwiat USim: A User Behavior Simulation Framework for Training and Testing IDSes in GUI Based Systems. [Citation Graph (0, 0)][DBLP ] Annual Simulation Symposium, 2006, pp:196-203 [Conf ] Suranjan Pramanik , Shambhu J. Upadhyaya RABIT: A New Framework for Runtime Emulation and Binary Translation. [Citation Graph (0, 0)][DBLP ] Annual Simulation Symposium, 2004, pp:213-220 [Conf ] Shambhu J. Upadhyaya , Jae Min Lee , Padmanabhan Nair Time Slot Specification Based Approach to Analog Fault Diagnosis Using Built-in Current Sensors and Test Point Insertion. [Citation Graph (0, 0)][DBLP ] Asian Test Symposium, 2002, pp:429-434 [Conf ] Chun-Yeh Liu , Kewal K. Saluja , Shambhu J. Upadhyaya BIST-PLA: A Built-in Self-Test Design of Large Programmable Logic Arrays. [Citation Graph (0, 0)][DBLP ] DAC, 1987, pp:385-391 [Conf ] Shambhu J. Upadhyaya , John A. Thodiyil BIST PLAs, Pass or Fail - A Case Study. [Citation Graph (0, 0)][DBLP ] DAC, 1990, pp:724-727 [Conf ] Kamran Zarrineh , Shambhu J. Upadhyaya On Programmable Memory Built-In Self Test Architectures. [Citation Graph (0, 0)][DBLP ] DATE, 1999, pp:708-713 [Conf ] S. Goldberg , Shambhu J. Upadhyaya Implementation of a Gracefully Degradable Binary Tree in Programmable. [Citation Graph (0, 0)][DBLP ] DFT, 1994, pp:28-36 [Conf ] Dan Zhao , Shambhu J. Upadhyaya Adaptive Test Scheduling in SoC's by Dynamic Partitioning. [Citation Graph (0, 0)][DBLP ] DFT, 2002, pp:334-344 [Conf ] Dan Zhao , Shambhu J. Upadhyaya , Martin Margala Control Constrained Resource Partitioning for Complex SoCs. [Citation Graph (0, 0)][DBLP ] DFT, 2003, pp:425-432 [Conf ] Nandakumar P. Venugopal , Nihal Shastry , Shambhu J. Upadhyaya Effect of Process Variation on the Performance of Phase Frequency Detector. [Citation Graph (0, 0)][DBLP ] DFT, 2006, pp:525-534 [Conf ] Lushan Li , Ramalingam Sridhar , Shambhu J. Upadhyaya A 3-port Register File Design for Improved Fault Tolerance on Resistive Defects in Core-Cells. [Citation Graph (0, 0)][DBLP ] DFT, 2006, pp:545-553 [Conf ] Ramkumar Chinchani , Anusha Iyer , Hung Q. Ngo , Shambhu J. Upadhyaya Towards a Theory of Insider Threat Assessment. [Citation Graph (0, 0)][DBLP ] DSN, 2005, pp:108-117 [Conf ] Ramkumar Chinchani , Anusha Iyer , Bharat Jayaraman , Shambhu J. Upadhyaya ARCHERR: Runtime Environment Driven Program Safety. [Citation Graph (0, 0)][DBLP ] ESORICS, 2004, pp:385-406 [Conf ] Lama Nachman , Kewal K. Saluja , Shambhu J. Upadhyaya , Robert Reuse Random Pattern Testing for Sequential Circuits Revisited. [Citation Graph (0, 0)][DBLP ] FTCS, 1996, pp:44-52 [Conf ] Bina Ramamurthy , Shambhu J. Upadhyaya , Ravishankar K. Iyer An Object-Oriented Testbed for the Evaluation of Checkpointing and Recovery Systems. [Citation Graph (0, 0)][DBLP ] FTCS, 1997, pp:194-203 [Conf ] Kamran Zarrineh , Shambhu J. Upadhyaya Programmable Memory BIST and a New Synthesis Framework. [Citation Graph (0, 0)][DBLP ] FTCS, 1999, pp:352-355 [Conf ] Dan Zhao , Shambhu J. Upadhyaya , Martin Margala Minimizing concurrent test time in SoC's by balancing resource usage. [Citation Graph (0, 0)][DBLP ] ACM Great Lakes Symposium on VLSI, 2002, pp:77-82 [Conf ] Jin Ki Kim , Raj Sharman , H. Raghav Rao , Shambhu J. Upadhyaya Framework for Analyzing Critical Incident Management Systems (CIMS). [Citation Graph (0, 0)][DBLP ] HICSS, 2006, pp:- [Conf ] Raj Sharman , H. Raghav Rao , Shambhu J. Upadhyaya , Partha Khot , Sumit Manocha , Saumitra Ganguly Functionality Defense by Heterogeneity: A new paradigm for Securing Systems. [Citation Graph (0, 0)][DBLP ] HICSS, 2004, pp:- [Conf ] Ashish Vikram , Sivakumar Chennuru , H. Raghav Rao , Shambhu J. Upadhyaya A Solution Architecture for Financial Institutions to Handle Illegal Activities: A Neural Networks Approach. [Citation Graph (0, 0)][DBLP ] HICSS, 2004, pp:- [Conf ] Ramkumar Chinchani , Anusha Iyer , Bharat Jayaraman , Shambhu J. Upadhyaya Insecure Programming: How Culpable is a Language's Syntax? [Citation Graph (0, 0)][DBLP ] IAW, 2003, pp:158-163 [Conf ] Manish Gupta , Shamik Banerjee , H. Raghav Rao , Shambhu J. Upadhyaya Intrusion Countermeasures Security Model Based on Prioritization Scheme for Intranet Access Security. [Citation Graph (0, 0)][DBLP ] IAW, 2003, pp:174-181 [Conf ] Shambhu J. Upadhyaya , Liang-Chi Chen On-chip test generation for combinational circuits by LFSR modification. [Citation Graph (0, 0)][DBLP ] ICCAD, 1993, pp:84-87 [Conf ] Jian Pei , Shambhu J. Upadhyaya , Faisal Farooq , Venugopal Govindaraju Data Mining for Intrusion Detection: Techniques, Applications and Systems. [Citation Graph (0, 0)][DBLP ] ICDE, 2004, pp:877- [Conf ] Sharmistha Bagchi-Sen , Jinkyu Lee , H. Raghav Rao , Shambhu J. Upadhyaya A Framework for Examining Skill Specialization, Gender Inequity, and Career Advancement in the Information Security Field . [Citation Graph (0, 0)][DBLP ] ICISS, 2005, pp:317-321 [Conf ] Sreejit Chakravarty , Shambhu J. Upadhyaya A Unified Approach to Designing Fault-Tolerant Processor Ensembles. [Citation Graph (0, 0)][DBLP ] ICPP (1), 1988, pp:339-342 [Conf ] Ravindranath Gummadidala , Chunming Qiao , Shambhu J. Upadhyaya WDP: A Wormhole Discovery Protocol for Mobile Ad-Hoc Networks. [Citation Graph (0, 0)][DBLP ] International Conference on Wireless Networks, 2004, pp:46-51 [Conf ] Kamran Zarrineh , Shambhu J. Upadhyaya A design for test perspective on memory synthesis. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 1999, pp:101-104 [Conf ] Rui Chen , Raj Sharman , H. Raghav Rao , Shambhu J. Upadhyaya Design Principles of Coordinated Multi-incident Emergency Response Systems. [Citation Graph (0, 0)][DBLP ] ISI, 2005, pp:81-98 [Conf ] Karthik Sundararaman , Shambhu J. Upadhyaya , Martin Margala Cost Model Analysis of DFT Based Fault Tolerant SOC Designs. [Citation Graph (0, 0)][DBLP ] ISQED, 2004, pp:465-469 [Conf ] Michael Demjanenko , Shambhu J. Upadhyaya Dynamic Techniques for Yield Enhancement of Field Programmable Logic Arrays. [Citation Graph (0, 0)][DBLP ] ITC, 1988, pp:485-491 [Conf ] Kamran Zarrineh , Shambhu J. Upadhyaya , Sreejit Chakravarty A new framework for generating optimal March tests for memory arrays. [Citation Graph (0, 0)][DBLP ] ITC, 1998, pp:73-0 [Conf ] Vidyaraman Sankaranarayanan , Shambhu J. Upadhyaya A Trust Assignment Model Based on Alternate Actions Payoff. [Citation Graph (0, 0)][DBLP ] iTrust, 2006, pp:339-353 [Conf ] Ramkumar Chinchani , Shambhu J. Upadhyaya , Kevin A. Kwiat A Tamper-Resistant Framework for Unambiguous Detection of Attacks in User Space Using Process Monitors. [Citation Graph (0, 0)][DBLP ] IWIA, 2003, pp:25-36 [Conf ] Sunu Mathew , Chintan Shah , Shambhu J. Upadhyaya An Alert Fusion Framework for Situation Awareness of Coordinated Multistage Attacks. [Citation Graph (0, 0)][DBLP ] IWIA, 2005, pp:95-104 [Conf ] Mohit Virendra , Shambhu J. Upadhyaya , Vivek Kumar , Vishal Anand SAWAN: A Survivable Architecture for Wireless LANs. [Citation Graph (0, 0)][DBLP ] IWIA, 2005, pp:71-82 [Conf ] Shambhu J. Upadhyaya Real-Time Intrusion Detection with Emphasis on Insider Attacks. [Citation Graph (0, 0)][DBLP ] MMM-ACNS, 2003, pp:82-85 [Conf ] Bina Ramamurthy , Shambhu J. Upadhyaya , Bharat K. Bhargava Design and Analysis of a Hardware-Assisted Checkpointing and Recovery Scheme for Distributed Applications. [Citation Graph (0, 0)][DBLP ] Symposium on Reliable Distributed Systems, 1998, pp:84-90 [Conf ] Shambhu J. Upadhyaya , Ramkumar Chinchani , Kevin A. Kwiat An Analytical Framework for Reasoning about Intrusions. [Citation Graph (0, 0)][DBLP ] SRDS, 2001, pp:99-0 [Conf ] Sunu Mathew , Richard Giomundo , Shambhu J. Upadhyaya , Moises Sudit , Adam Stotz Understanding multistage attacks by attack-track based visualization of heterogeneous event streams. [Citation Graph (0, 0)][DBLP ] VizSEC, 2006, pp:1-6 [Conf ] Kamran Zarrineh , Shambhu J. Upadhyaya A New Framework For Automatic Generation, Insertion and Verification of Memory Built-In Self Test Units. [Citation Graph (0, 0)][DBLP ] VTS, 1999, pp:391-397 [Conf ] Kamran Zarrineh , Shambhu J. Upadhyaya , Philip Shephard III Automatic Insertion of Scan Structures to Enhance Testability of Embedded Memories, Cores and Chips. [Citation Graph (0, 0)][DBLP ] VTS, 1998, pp:98-105 [Conf ] Dan Zhao , Shambhu J. Upadhyaya Power Constrained Test Scheduling with Dynamically Varied TAM. [Citation Graph (0, 0)][DBLP ] VTS, 2003, pp:273-278 [Conf ] Madhusudhanan Chandrasekaran , Ramkumar Chinchani , Shambhu J. Upadhyaya PHONEY: Mimicking User Response to Detect Phishing Attacks. [Citation Graph (0, 0)][DBLP ] WOWMOM, 2006, pp:668-672 [Conf ] Amruth N. Kumar , Shambhu J. Upadhyaya Function-based candidate discrimination during model-based diagnosis. [Citation Graph (0, 0)][DBLP ] Applied Artificial Intelligence, 1995, v:9, n:1, pp:65-80 [Journal ] Amruth N. Kumar , Shambhu J. Upadhyaya Focusing candidate generation. [Citation Graph (0, 0)][DBLP ] AI in Engineering, 1991, v:6, n:3, pp:156-159 [Journal ] Amruth N. Kumar , Shambhu J. Upadhyaya Component-ontological representation of function for reasoning about devices. [Citation Graph (0, 0)][DBLP ] AI in Engineering, 1998, v:12, n:4, pp:399-415 [Journal ] Jinkyu Lee , Shambhu J. Upadhyaya , H. Raghav Rao , Raj Sharman Secure knowledge management and the semantic web. [Citation Graph (0, 0)][DBLP ] Commun. ACM, 2005, v:48, n:12, pp:48-54 [Journal ] G. B. Tanna , Manish Gupta , H. Raghav Rao , Shambhu J. Upadhyaya Information assurance metric development framework for electronic bill presentment and payment systems using transaction and workflow analysis. [Citation Graph (0, 0)][DBLP ] Decision Support Systems, 2005, v:41, n:1, pp:242-261 [Journal ] Debanjan Ghosh , Raj Sharman , H. Raghav Rao , Shambhu J. Upadhyaya Self-healing systems - survey and synthesis. [Citation Graph (0, 0)][DBLP ] Decision Support Systems, 2007, v:42, n:4, pp:2164-2185 [Journal ] Sreejit Chakravarty , Ramalingam Sridhar , Shambhu J. Upadhyaya , Yervant Zorian , Gil Philips , Bozena Kaminska , Bernard Courtois Conference Reports. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1995, v:12, n:4, pp:95-97 [Journal ] Kamran Zarrineh , Shambhu J. Upadhyaya , Vivek Chickermane System-on-Chip Testability Using LSSD Scan Structures. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2001, v:18, n:3, pp:83-97 [Journal ] Ramkumar Chinchani , Duc Ha , Anusha Iyer , Hung Q. Ngo , Shambhu J. Upadhyaya On the Hardness of Approximating the Min-Hack Problem. [Citation Graph (0, 0)][DBLP ] J. Comb. Optim., 2005, v:9, n:3, pp:295-311 [Journal ] Yung-Yuan Chen , Shambhu J. Upadhyaya Reliability, Reconfiguration, and Spare Allocation Issues in Binary-Tree Architectures Based on Multiple-Level Redundancy. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1993, v:42, n:6, pp:713-723 [Journal ] Yung-Yuan Chen , Shambhu J. Upadhyaya Yield Analysis of Reconfigurable Array Processors Based on Multiple-Level Redundancy. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1993, v:42, n:9, pp:1136-1141 [Journal ] Yung-Yuan Chen , Shambhu J. Upadhyaya Modeling the Reliability of a Class of Fault-Tolerant VLSI/WSI Systems Based on Multiple-Level Redundancy. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1994, v:43, n:6, pp:737-748 [Journal ] Yung-Yuan Chen , Shambhu J. Upadhyaya , Ching-Hwa Cheng A Comprehensive Reconfiguration Scheme for Fault-Tolerant VLSI/WSI Array Processors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1997, v:46, n:12, pp:1363-1371 [Journal ] Lama Nachman , Kewal K. Saluja , Shambhu J. Upadhyaya , Robert Reuse A Novel Approach to Random Pattern Testing of Sequential Circuits. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1998, v:47, n:1, pp:129-134 [Journal ] Shambhu J. Upadhyaya , Andrea Bondavalli Guest Editorial: Special Issue on Reliable Distributed Systems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2003, v:52, n:2, pp:97-98 [Journal ] Shambhu J. Upadhyaya , Hoang Pham Analysis of Noncoherent Systems and an Architecture for the Computation of the System Reliability. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1993, v:42, n:4, pp:484-493 [Journal ] Shambhu J. Upadhyaya , Bina Ramamurthy Concurrent Process Monitoring with No Reference Signatures. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1994, v:43, n:4, pp:475-480 [Journal ] Michael Demjanenko , Shambhu J. Upadhyaya Yield enhancement of field programmable logic arrays by inherent component redundancy. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:8, pp:876-884 [Journal ] Shambhu J. Upadhyaya , Kewal K. Saluja A new approach to the design of built-in self-testing PLAs for high fault coverage. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:1, pp:60-67 [Journal ] Dan Zhao , Shambhu J. Upadhyaya Dynamically partitioned test scheduling with adaptive TAM configuration for power-constrained SoC testing. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:6, pp:956-965 [Journal ] Dan Zhao , Shambhu J. Upadhyaya , Martin Margala Design of a wireless test control network with radio-on-chip technology for nanometer system-on-a-chip. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:7, pp:1411-1418 [Journal ] Bina Ramamurthy , Shambhu J. Upadhyaya , Bharat K. Bhargava Design and Analysis of an Integrated Checkpointing Recovery Scheme for Distributed Applications. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Knowl. Data Eng., 2000, v:12, n:2, pp:174-186 [Journal ] Shambhu J. Upadhyaya , Kewal K. Saluja A Wachtdog Processor Based General Rollback Technique with Multiple Retries. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Software Eng., 1986, v:12, n:1, pp:87-95 [Journal ] Vidyaraman Sankaranarayanan , Madhusudhanan Chandrasekaran , Shambhu J. Upadhyaya Towards Modeling Trust Based Decisions: A Game Theoretic Approach. [Citation Graph (0, 0)][DBLP ] ESORICS, 2007, pp:485-500 [Conf ] Sangmi Chai , Raj Sharman , Smitha Patil , Shruta Satam , H. Raghav Rao , Shambhu J. Upadhyaya Surface Transportation and Cyber-Infrastructure: An Exploratory Study. [Citation Graph (0, 0)][DBLP ] ISI, 2007, pp:124-128 [Conf ] Raj Sharman , Himabindu Challapalli , H. Raghav Rao , Shambhu J. Upadhyaya A Framework for a Secure Federated Patient Healthcare System. [Citation Graph (0, 0)][DBLP ] ISI, 2004, pp:512-513 [Conf ] Insu Park , R. Sharman , H. R. Rao , S. Upadhyaya Short Term and Total Life Impact analysis of email worms in computer systems. [Citation Graph (0, 0)][DBLP ] Decision Support Systems, 2007, v:43, n:3, pp:827-841 [Journal ] Jin Ki Kim , Raj Sharman , H. Raghav Rao , Shambhu Upadhyaya Efficiency of critical incident management systems: Instrument development and validation. [Citation Graph (0, 0)][DBLP ] Decision Support Systems, 2007, v:44, n:1, pp:235-250 [Journal ] Rui Chen , Raj Sharman , H. Raghav Rao , Shambhu J. Upadhyaya Design principles for critical incident response systems. [Citation Graph (0, 0)][DBLP ] Inf. Syst. E-Business Management, 2007, v:5, n:3, pp:201-227 [Journal ] S. Goldberg , Shambhu J. Upadhyaya , W. Kent Fuchs Recovery schemes for mesh arrays utilizing dedicated spares. [Citation Graph (0, 0)][DBLP ] IEEE Transactions on Reliability, 2004, v:53, n:4, pp:445-451 [Journal ] Kamran Zarrineh , Shambhu J. Upadhyaya , Sreejit Chakravarty Automatic generation and compaction of March tests for memory arrays. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2001, v:9, n:6, pp:845-857 [Journal ] On the Hardness of Minimum Cost Blocking Attacks on Multi-Path Wireless Routing Protocols. [Citation Graph (, )][DBLP ] Inferring Sources of Leaks in Document Management Systems. [Citation Graph (, )][DBLP ] Insider Threat Analysis Using Information-Centric Modeling. [Citation Graph (, )][DBLP ] Towards a Theory of Robust Localization Against Malicious Beacon Nodes. [Citation Graph (, )][DBLP ] QoS-T: QoS Throttling to Elicit User Cooperation in Computer Systems. [Citation Graph (, )][DBLP ] A Data-Centric Approach to Insider Attack Detection in Database Systems. [Citation Graph (, )][DBLP ] A Novel Approach for Security and Robustness in Wireless Embedded Systems. [Citation Graph (, )][DBLP ] ASFALT: A Simple Fault-Tolerant Signature-based Localization Technique for Emergency Sensor Networks. [Citation Graph (, )][DBLP ] SpyCon: Emulating User Activities to Detect Evasive Spyware. [Citation Graph (, )][DBLP ] AVARE: aggregated vulnerability assessment and response against zero-day exploits. [Citation Graph (, )][DBLP ] Towards a theory for securing time synchronization in wireless sensor networks. [Citation Graph (, )][DBLP ] Coordination in emergency response management. [Citation Graph (, )][DBLP ] Security in grid computing: A review and synthesis. [Citation Graph (, )][DBLP ] Search in 0.007secs, Finished in 0.011secs