The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Junfeng Fan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Haibin Shen, Junfeng Fan
    Efficient Frame Rate Control Algorithm and Its Implementation. [Citation Graph (0, 0)][DBLP]
    IMSCCS (1), 2006, pp:799-802 [Conf]

  2. Low-cost implementations of NTRU for pervasive security. [Citation Graph (, )][DBLP]


  3. Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security. [Citation Graph (, )][DBLP]


  4. Faster -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves. [Citation Graph (, )][DBLP]


  5. FPGA Design for Algebraic Tori-Based Public-Key Cryptography. [Citation Graph (, )][DBLP]


  6. FPGA-based testing strategy for cryptographic chips: A case study on Elliptic Curve Processor for RFID tags. [Citation Graph (, )][DBLP]


  7. HECC Goes Embedded: An Area-Efficient Implementation of HECC. [Citation Graph (, )][DBLP]


  8. Modular Reduction in GF(2n) without Pre-computational Phase. [Citation Graph (, )][DBLP]


  9. Unified Digit-Serial Multiplier and Inverter in Finite Field GF(2m). [Citation Graph (, )][DBLP]


  10. Montgomery Modular Multiplication Algorithm on Multi-Core Systems. [Citation Graph (, )][DBLP]


  11. A digit-serial architecture for inversion and multiplication in GF(2M). [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002